mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
fe1c3cd3af
There is no reasonably robust way (this will be needed so early that diagnostics will be limited) to specify the base-address of the secure timer through the DTS for TPL and SPL. In order to allow us a cleaner way to structure our SPL and TPL stage, we now move to a DM timer driver. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
96 lines
2.4 KiB
Text
96 lines
2.4 KiB
Text
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SPL_LIBCOMMON_SUPPORT=y
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CONFIG_SPL_LIBGENERIC_SUPPORT=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3368=y
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CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0
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CONFIG_TPL_LIBCOMMON_SUPPORT=y
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CONFIG_TPL_LIBGENERIC_SUPPORT=y
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CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_SPL_SPI_FLASH_SUPPORT=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_SPL_STACK_R_ADDR=0x600000
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CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion"
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CONFIG_SMBIOS_PRODUCT_NAME="sheep_rk3368"
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CONFIG_DEBUG_UART=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_SPL_LOAD_FIT=y
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CONFIG_SPL_FIT_SOURCE="board/theobroma-systems/lion_rk3368/fit_spl_atf.its"
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CONFIG_ENV_IS_IN_MMC=y
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_ARCH_EARLY_INIT_R=y
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CONFIG_SPL=y
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CONFIG_SPL_LDSCRIPT="arch/arm/cpu/armv8/u-boot-spl.lds"
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CONFIG_SPL_BOOTROM_SUPPORT=y
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# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set
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CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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CONFIG_SPL_STACK_R=y
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CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200
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CONFIG_SPL_ATF_SUPPORT=y
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CONFIG_SPL_ATF_TEXT_BASE=0x10000
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CONFIG_TPL=y
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CONFIG_TPL_BOOTROM_SUPPORT=y
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CONFIG_TPL_DRIVERS_MISC_SUPPORT=y
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CONFIG_FASTBOOT=y
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CONFIG_ANDROID_BOOT_IMAGE=y
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# CONFIG_CMD_IMLS is not set
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CONFIG_CMD_MMC=y
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CONFIG_CMD_SF=y
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CONFIG_CMD_GPIO=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_CMD_MTDPARTS=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_TPL_OF_CONTROL=y
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CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names interrupt-parent"
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CONFIG_TPL_OF_PLATDATA=y
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CONFIG_NET_RANDOM_ETHADDR=y
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CONFIG_TPL_DM=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_TPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_SPL_SYSCON=y
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CONFIG_TPL_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_TPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_MMC_DW=y
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CONFIG_MMC_DW_ROCKCHIP=y
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CONFIG_SPI_FLASH=y
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CONFIG_SPI_FLASH_MACRONIX=y
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CONFIG_SPI_FLASH_WINBOND=y
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CONFIG_PHY_MICREL=y
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CONFIG_PHY_MICREL_KSZ9031=y
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CONFIG_DM_ETH=y
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CONFIG_ETH_DESIGNWARE=y
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CONFIG_RGMII=y
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CONFIG_GMAC_ROCKCHIP=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_PINCTRL_ROCKCHIP_RK3368=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_RK8XX=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_TPL_RAM=y
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CONFIG_DEBUG_UART_BASE=0xFF180000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_DEBUG_UART_ANNOUNCE=y
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CONFIG_DEBUG_UART_SKIP_INIT=y
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CONFIG_ROCKCHIP_SPI=y
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CONFIG_SYSRESET=y
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CONFIG_TIMER=y
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CONFIG_SPL_TIMER=y
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CONFIG_TPL_TIMER=y
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CONFIG_ROCKCHIP_TIMER=y
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CONFIG_USE_TINY_PRINTF=y
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CONFIG_SPL_TINY_MEMSET=y
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CONFIG_LZO=y
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CONFIG_ERRNO_STR=y
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CONFIG_SMBIOS_MANUFACTURER="rockchip"
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