mirror of
https://github.com/AsahiLinux/u-boot
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15f09a1a83
Rockchip use 'arch-rockchip' instead of arch-$(SOC) as common header file path, so that we can get the correct path directly. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
108 lines
2.5 KiB
C
108 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
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* Copyright (c) 2015 Google, Inc
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* Copyright 2014 Rockchip Inc.
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*/
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#include <common.h>
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#include <display.h>
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#include <dm.h>
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#include <regmap.h>
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#include <syscon.h>
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#include <video.h>
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#include <asm/io.h>
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#include <asm/arch-rockchip/clock.h>
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#include <asm/arch-rockchip/grf_rk3288.h>
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#include <asm/arch-rockchip/hardware.h>
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#include "rk_vop.h"
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DECLARE_GLOBAL_DATA_PTR;
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static void rk3288_set_pin_polarity(struct udevice *dev,
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enum vop_modes mode, u32 polarity)
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{
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struct rk_vop_priv *priv = dev_get_priv(dev);
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struct rk3288_vop *regs = priv->regs;
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/* The RK3328 VOP (v3.1) has its polarity configuration in ctrl0 */
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clrsetbits_le32(®s->dsp_ctrl0,
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M_DSP_DCLK_POL | M_DSP_DEN_POL |
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M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
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V_DSP_PIN_POL(polarity));
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}
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static void rk3288_set_io_vsel(struct udevice *dev)
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{
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struct rk3288_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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/* lcdc(vop) iodomain select 1.8V */
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rk_setreg(&grf->io_vsel, 1 << 0);
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}
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/*
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* Try some common regulators. We should really get these from the
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* device tree somehow.
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*/
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static const char * const rk3288_regulator_names[] = {
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"vcc18_lcd",
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"VCC18_LCD",
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"vdd10_lcd_pwren_h",
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"vdd10_lcd",
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"VDD10_LCD",
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"vcc33_lcd"
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};
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static int rk3288_vop_probe(struct udevice *dev)
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{
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/* Before relocation we don't need to do anything */
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if (!(gd->flags & GD_FLG_RELOC))
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return 0;
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/* Set the LCDC(vop) iodomain to 1.8V */
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rk3288_set_io_vsel(dev);
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/* Probe regulators required for the RK3288 VOP */
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rk_vop_probe_regulators(dev, rk3288_regulator_names,
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ARRAY_SIZE(rk3288_regulator_names));
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return rk_vop_probe(dev);
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}
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static int rk_vop_remove(struct udevice *dev)
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{
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struct rk_vop_priv *priv = dev_get_priv(dev);
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struct rk3288_vop *regs = priv->regs;
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setbits_le32(®s->sys_ctrl, V_STANDBY_EN(1));
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/* wait frame complete (60Hz) to enter standby */
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mdelay(17);
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return 0;
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}
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struct rkvop_driverdata rk3288_driverdata = {
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.features = VOP_FEATURE_OUTPUT_10BIT,
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.set_pin_polarity = rk3288_set_pin_polarity,
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};
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static const struct udevice_id rk3288_vop_ids[] = {
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{ .compatible = "rockchip,rk3288-vop",
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.data = (ulong)&rk3288_driverdata },
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{ }
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};
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static const struct video_ops rk3288_vop_ops = {
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};
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U_BOOT_DRIVER(rk_vop) = {
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.name = "rk3288_vop",
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.id = UCLASS_VIDEO,
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.of_match = rk3288_vop_ids,
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.ops = &rk3288_vop_ops,
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.bind = rk_vop_bind,
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.probe = rk3288_vop_probe,
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.remove = rk_vop_remove,
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.priv_auto_alloc_size = sizeof(struct rk_vop_priv),
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};
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