mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
34e026f9b1
Mostly reusing DDR3 driver, this patch adds DDR4 SPD handling, register calculation and programming. Signed-off-by: York Sun <yorksun@freescale.com>
18 lines
367 B
C
18 lines
367 B
C
/*
|
|
* Copyright 2014 Freescale Semiconductor, Inc.
|
|
*
|
|
* SPDX-License-Identifier: GPL-2.0+
|
|
*/
|
|
|
|
#ifndef __FSL_DDRC_VER_H
|
|
#define __FSL_DDRC_VER_H
|
|
|
|
/*
|
|
* Only the versions with distinct features or registers are listed here.
|
|
*/
|
|
#define FSL_DDR_VER_4_4 44
|
|
#define FSL_DDR_VER_4_6 46
|
|
#define FSL_DDR_VER_4_7 47
|
|
#define FSL_DDR_VER_5_0 50
|
|
|
|
#endif /* __FSL_DDRC_VER_H */
|