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Currently a divider of 6 has been used, leading to following NAND Flash Controller (NFC) clocks: VF61: 27.7 MHz (166.7MHz bus clock) VF50: 22 MHz (132MHz bus clock) The NAND Flash Memory used on VF50 allows to use clock speed of up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can use the same divider of 4 on both modules to configure the maximal possible clock speeds: VF61: 41.7 MHz VF50: 33 MHz Signed-off-by: Stefan Agner <stefan.agner@toradex.com> |
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colibri_vf.c | ||
imximage.cfg | ||
Kconfig | ||
MAINTAINERS | ||
Makefile |