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39dca76c34
Due to an upstream change, the ls1028a.dtsi bindings for the mscc_felix
switch got accepted with all ports disabled by default and with no link
to the DSA master - this needs to be done on a per board basis.
Note that enetc-2 is not currently disabled in the ls1028a.dtsi, but
presumably at some point it might become. Explicitly enable it in the
QDS device trees anyway, to proactively avoid issues when that happens.
Fixes: a7fdac7e2a ("arm: dts: ls1028a: define QDS networking protocol combinations")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
57 lines
1.3 KiB
Text
57 lines
1.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* NXP LS1028A-QDS device tree fragment for RCW x3xx
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*
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* Copyright 2019-2021 NXP Semiconductors
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*/
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/*
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* This setup is using a SCH-30841-R card with AQR412 quad PHY in slot 2. This
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* is used for the 4 integrated ethernet switch in a multiplexes USXGMII set-up.
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*
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* We're including the normal .dsti file, not the reworked card .dtsi
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* intentionally. We are using multiplexing of the 4 interfaces on a single
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* lane and the rework doesn't actually disable any port. The rework is in fact
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* needed, otherwise the PHY won't work with the default wiring on the QDS/PHY
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* card.
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*/
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&slot2 {
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#include "fsl-sch-30841.dtsi"
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};
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&enetc2 {
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status = "okay";
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};
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&mscc_felix {
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status = "okay";
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};
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&mscc_felix_port0 {
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status = "okay";
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phy-mode = "usxgmii";
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phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
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};
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&mscc_felix_port1 {
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status = "okay";
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phy-mode = "usxgmii";
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phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
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};
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&mscc_felix_port2 {
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status = "okay";
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phy-mode = "usxgmii";
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phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
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};
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&mscc_felix_port3 {
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status = "okay";
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phy-mode = "usxgmii";
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phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
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};
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&mscc_felix_port4 {
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ethernet = <&enetc2>;
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status = "okay";
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};
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