mirror of
https://github.com/AsahiLinux/u-boot
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e0ac62d798
allow selection of clock frequency as "make" target * Implement memory autosizing code for IceCube boards * Configure network port on INCA-IP for autonegotiation * Fix overflow problem in network timeout code * Patch by Richard Woodruff, 8 Aug 2003: Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
158 lines
4.8 KiB
C
158 lines
4.8 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* This file contains the configuration parameters for the INCA-IP board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
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#define CONFIG_INCA_IP 1 /* on a INCA-IP Board */
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#ifndef CPU_CLOCK_RATE
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/* allowed values: 100000000, 133000000, and 150000000 */
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#define CPU_CLOCK_RATE 133000000 /* 133 MHz clock for the MIPS core */
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#endif
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#if CPU_CLOCK_RATE == 100000000
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#define INFINEON_EBU_BOOTCFG 0x20C4 /* CMULT = 4 for 100 MHz */
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#else
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#define INFINEON_EBU_BOOTCFG 0x40C4 /* CMULT = 8 for 150 MHz */
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#endif
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_BAUDRATE 115200
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/* valid baudrates */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
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#define CONFIG_TIMESTAMP /* Print image info with timestamp */
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
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"echo"
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#undef CONFIG_BOOTARGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"nfsargs=setenv bootargs root=/dev/nfs rw " \
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"nfsroot=$(serverip):$(rootpath)\0" \
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"ramargs=setenv bootargs root=/dev/ram rw\0" \
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"addip=setenv bootargs $(bootargs) " \
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"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
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":$(hostname):$(netdev):off\0" \
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"addmisc=setenv bootargs $(bootargs) " \
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"console=ttyS0,$(baudrate) " \
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"ethaddr=$(ethaddr) " \
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"panic=1\0" \
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"flash_nfs=run nfsargs addip addmisc;" \
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"bootm $(kernel_addr)\0" \
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"flash_self=run ramargs addip addmisc;" \
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"bootm $(kernel_addr) $(ramdisk_addr)\0" \
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"net_nfs=tftp 80500000 $(bootfile);" \
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"run nfsargs addip addmisc;bootm\0" \
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"rootpath=/opt/eldk/mips_4KC\0" \
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"bootfile=/tftpboot/INCA/uImage\0" \
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"kernel_addr=B0040000\0" \
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"ramdisk_addr=B0100000\0" \
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"u-boot=/tftpboot/INCA/u-boot.bin\0" \
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"load=tftp 80500000 $(u-boot)\0" \
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"update=protect off 1:0-2;era 1:0-2;" \
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"cp.b 80500000 B0000000 $(filesize)\0" \
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""
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#define CONFIG_BOOTCOMMAND "run flash_self"
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#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
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CFG_CMD_ASKENV | \
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CFG_CMD_DHCP | \
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CFG_CMD_ELF )
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#include <cmd_confdefs.h>
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "INCA-IP # " /* Monitor Command Prompt */
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args*/
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#define CFG_MALLOC_LEN 128*1024
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#define CFG_BOOTPARAMS_LEN 128*1024
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#define CFG_HZ (CPU_CLOCK_RATE/2)
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#define CFG_SDRAM_BASE 0x80000000
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#define CFG_LOAD_ADDR 0x80100000 /* default load address */
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#define CFG_MEMTEST_START 0x80100000
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#define CFG_MEMTEST_END 0x80800000
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/*-----------------------------------------------------------------------
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* FLASH and environment organization
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*/
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#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
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#define CFG_MAX_FLASH_SECT (128) /* max number of sectors on one chip */
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#define PHYS_FLASH_1 0xb0000000 /* Flash Bank #1 */
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#define PHYS_FLASH_2 0xb0800000 /* Flash Bank #2 */
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/* The following #defines are needed to get flash environment right */
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#define CFG_MONITOR_BASE TEXT_BASE
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#define CFG_MONITOR_LEN (192 << 10)
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#define CFG_INIT_SP_OFFSET 0x400000
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#define CFG_FLASH_BASE PHYS_FLASH_1
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/* timeout values are in ticks */
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#define CFG_FLASH_ERASE_TOUT (2 * CFG_HZ) /* Timeout for Flash Erase */
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#define CFG_FLASH_WRITE_TOUT (2 * CFG_HZ) /* Timeout for Flash Write */
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#define CFG_ENV_IS_IN_FLASH 1
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/* Address and size of Primary Environment Sector */
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#define CFG_ENV_ADDR 0xB0030000
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#define CFG_ENV_SIZE 0x10000
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#define CONFIG_FLASH_16BIT
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#define CONFIG_NR_DRAM_BANKS 1
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#define CONFIG_INCA_IP_SWITCH
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#define CONFIG_NET_MULTI
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/*-----------------------------------------------------------------------
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* Cache Configuration
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*/
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#define CFG_DCACHE_SIZE 4096
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#define CFG_ICACHE_SIZE 4096
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#define CFG_CACHELINE_SIZE 16
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#endif /* __CONFIG_H */
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