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97a8d010e0
Recently the FMan Port and MAC compatibles were changed. This patch aligns the FMan Port and MAC compatibles to the new FMan device tree binding document. The FMan device tree binding document can be found in the Linux kernel: ./Documentation/devicetree/bindings/powerpc/fsl/fman.txt This patch doesn't affect legacy compatibles support. Signed-off-by: Igal Liberman <igal.liberman@freescale.com> Tested-by: Xing Lei <xing.lei@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
413 lines
9.9 KiB
C
413 lines
9.9 KiB
C
/*
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* Copyright 2008-2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <asm/immap_85xx.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)
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{
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liodns[0] = liodn_bases[dpaa_dev].id[0] + liodn_offset;
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if (liodn_bases[dpaa_dev].num_ids == 2)
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liodns[1] = liodn_bases[dpaa_dev].id[1] + liodn_offset;
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return liodn_bases[dpaa_dev].num_ids;
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}
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#ifdef CONFIG_SYS_SRIO
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static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size)
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{
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int i;
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for (i = 0; i < size; i++) {
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unsigned long reg_off = tbl[i].reg_offset[0];
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out_be32((u32 *)reg_off, tbl[i].id[0]);
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if (tbl[i].num_ids == 2) {
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reg_off = tbl[i].reg_offset[1];
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out_be32((u32 *)reg_off, tbl[i].id[1]);
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}
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}
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}
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#endif
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static void set_liodn(struct liodn_id_table *tbl, int size)
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{
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int i;
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for (i = 0; i < size; i++) {
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u32 liodn;
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if (tbl[i].num_ids == 2) {
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liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
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} else {
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liodn = tbl[i].id[0];
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}
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out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
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}
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}
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void set_fman_liodn(struct fman_liodn_id_table *tbl, int size)
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{
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int i;
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for (i = 0; i < size; i++) {
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u32 liodn;
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if (tbl[i].num_ids == 2)
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liodn = (tbl[i].id[0] << 16) | tbl[i].id[1];
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else
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liodn = tbl[i].id[0];
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out_be32((volatile u32 *)(tbl[i].reg_offset), liodn);
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}
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}
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#endif
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static void setup_sec_liodn_base(void)
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{
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ccsr_sec_t *sec = (void *)CONFIG_SYS_FSL_SEC_ADDR;
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u32 base;
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if (!IS_E_PROCESSOR(get_svr()))
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return;
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/* QILCR[QSLOM] */
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sec_out32(&sec->qilcr_ms, 0x3ff<<16);
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base = (liodn_bases[FSL_HW_PORTAL_SEC].id[0] << 16) |
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liodn_bases[FSL_HW_PORTAL_SEC].id[1];
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sec_out32(&sec->qilcr_ls, base);
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}
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void setup_fman_liodn_base(enum fsl_dpaa_dev dev,
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struct fman_liodn_id_table *tbl, int size)
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{
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int i;
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ccsr_fman_t *fm;
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u32 base;
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switch(dev) {
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case FSL_HW_PORTAL_FMAN1:
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fm = (void *)CONFIG_SYS_FSL_FM1_ADDR;
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break;
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#if (CONFIG_SYS_NUM_FMAN == 2)
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case FSL_HW_PORTAL_FMAN2:
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fm = (void *)CONFIG_SYS_FSL_FM2_ADDR;
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break;
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#endif
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default:
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printf("Error: Invalid device type to %s\n", __FUNCTION__);
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return ;
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}
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base = (liodn_bases[dev].id[0] << 16) | liodn_bases[dev].id[0];
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/* setup all bases the same */
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for (i = 0; i < 32; i++) {
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out_be32(&fm->fm_dma.fmdmplr[i], base);
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}
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/* update tbl to ... */
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for (i = 0; i < size; i++)
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tbl[i].id[0] += liodn_bases[dev].id[0];
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}
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#endif
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static void setup_pme_liodn_base(void)
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{
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#ifdef CONFIG_SYS_DPAA_PME
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ccsr_pme_t *pme = (void *)CONFIG_SYS_FSL_CORENET_PME_ADDR;
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u32 base = (liodn_bases[FSL_HW_PORTAL_PME].id[0] << 16) |
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liodn_bases[FSL_HW_PORTAL_PME].id[1];
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out_be32(&pme->liodnbr, base);
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#endif
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}
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#ifdef CONFIG_SYS_FSL_RAID_ENGINE
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static void setup_raide_liodn_base(void)
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{
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struct ccsr_raide *raide = (void *)CONFIG_SYS_FSL_RAID_ENGINE_ADDR;
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/* setup raid engine liodn base for data/desc ; both set to 47 */
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u32 base = (liodn_bases[FSL_HW_PORTAL_RAID_ENGINE].id[0] << 16) |
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liodn_bases[FSL_HW_PORTAL_RAID_ENGINE].id[0];
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out_be32(&raide->liodnbr, base);
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}
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#endif
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#ifdef CONFIG_SYS_DPAA_RMAN
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static void set_rman_liodn(struct liodn_id_table *tbl, int size)
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{
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int i;
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struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR;
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for (i = 0; i < size; i++) {
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/* write the RMan block number */
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out_be32(&rman->mmitar, i);
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/* write the liodn offset corresponding to the block */
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out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]);
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}
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}
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static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size)
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{
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int i;
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struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR;
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u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0];
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out_be32(&rman->mmliodnbr, base);
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/* update liodn offset */
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for (i = 0; i < size; i++)
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tbl[i].id[0] += base;
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}
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#endif
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void set_liodns(void)
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{
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/* setup general liodn offsets */
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set_liodn(liodn_tbl, liodn_tbl_sz);
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#ifdef CONFIG_SYS_SRIO
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/* setup SRIO port liodns */
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set_srio_liodn(srio_liodn_tbl, srio_liodn_tbl_sz);
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#endif
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/* setup SEC block liodn bases & offsets if we have one */
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if (IS_E_PROCESSOR(get_svr())) {
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set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz);
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setup_sec_liodn_base();
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}
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/* setup FMAN block(s) liodn bases & offsets if we have one */
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#ifdef CONFIG_SYS_DPAA_FMAN
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set_fman_liodn(fman1_liodn_tbl, fman1_liodn_tbl_sz);
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setup_fman_liodn_base(FSL_HW_PORTAL_FMAN1, fman1_liodn_tbl,
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fman1_liodn_tbl_sz);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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set_fman_liodn(fman2_liodn_tbl, fman2_liodn_tbl_sz);
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setup_fman_liodn_base(FSL_HW_PORTAL_FMAN2, fman2_liodn_tbl,
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fman2_liodn_tbl_sz);
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#endif
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#endif
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/* setup PME liodn base */
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setup_pme_liodn_base();
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#ifdef CONFIG_SYS_FSL_RAID_ENGINE
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/* raid engine ccr addr code for liodn */
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set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz);
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setup_raide_liodn_base();
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#endif
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#ifdef CONFIG_SYS_DPAA_RMAN
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/* setup RMan liodn offsets */
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set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz);
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/* setup RMan liodn base */
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setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz);
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#endif
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}
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#ifdef CONFIG_SYS_SRIO
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static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)
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{
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int i, srio_off;
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/* search for srio node, if doesn't exist just return - nothing todo */
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srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
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if (srio_off < 0)
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return ;
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for (i = 0; i < srio_liodn_tbl_sz; i++) {
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int off, portid = tbl[i].portid;
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off = fdt_node_offset_by_prop_value(blob, srio_off,
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"cell-index", &portid, 4);
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if (off >= 0) {
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off = fdt_setprop(blob, off, "fsl,liodn",
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&tbl[i].id[0],
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sizeof(u32) * tbl[i].num_ids);
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if (off > 0)
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printf("WARNING unable to set fsl,liodn for "
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"fsl,srio port %d: %s\n",
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portid, fdt_strerror(off));
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} else {
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debug("WARNING: couldn't set fsl,liodn for srio: %s.\n",
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fdt_strerror(off));
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}
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}
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}
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#endif
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#define CONFIG_SYS_MAX_PCI_EPS 8
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static void fdt_fixup_pci_liodn_offsets(void *fdt, const char *compat,
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int ep_liodn_start)
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{
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int off, pci_idx = 0, pci_cnt = 0, i, rc;
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const uint32_t *base_liodn;
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uint32_t liodn_offs[CONFIG_SYS_MAX_PCI_EPS + 1] = { 0 };
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/*
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* Count the number of pci nodes.
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* It's needed later when the interleaved liodn offsets are generated.
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*/
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off = fdt_node_offset_by_compatible(fdt, -1, compat);
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while (off != -FDT_ERR_NOTFOUND) {
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pci_cnt++;
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off = fdt_node_offset_by_compatible(fdt, off, compat);
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}
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for (off = fdt_node_offset_by_compatible(fdt, -1, compat);
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off != -FDT_ERR_NOTFOUND;
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off = fdt_node_offset_by_compatible(fdt, off, compat)) {
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base_liodn = fdt_getprop(fdt, off, "fsl,liodn", &rc);
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if (!base_liodn) {
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char path[64];
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if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
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strcpy(path, "(unknown)");
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printf("WARNING Could not get liodn of node %s: %s\n",
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path, fdt_strerror(rc));
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continue;
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}
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for (i = 0; i < CONFIG_SYS_MAX_PCI_EPS; i++)
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liodn_offs[i + 1] = ep_liodn_start +
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i * pci_cnt + pci_idx - *base_liodn;
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rc = fdt_setprop(fdt, off, "fsl,liodn-offset-list",
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liodn_offs, sizeof(liodn_offs));
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if (rc) {
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char path[64];
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if (fdt_get_path(fdt, off, path, sizeof(path)) < 0)
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strcpy(path, "(unknown)");
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printf("WARNING Unable to set fsl,liodn-offset-list for "
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"node %s: %s\n", path, fdt_strerror(rc));
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continue;
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}
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pci_idx++;
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}
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}
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static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
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{
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int i;
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for (i = 0; i < sz; i++) {
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int off;
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if (tbl[i].compat == NULL)
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continue;
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off = fdt_node_offset_by_compat_reg(blob,
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tbl[i].compat, tbl[i].compat_offset);
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if (off >= 0) {
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off = fdt_setprop(blob, off, "fsl,liodn",
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&tbl[i].id[0],
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sizeof(u32) * tbl[i].num_ids);
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if (off > 0)
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printf("WARNING unable to set fsl,liodn for "
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"%s: %s\n",
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tbl[i].compat, fdt_strerror(off));
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} else {
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debug("WARNING: could not set fsl,liodn for %s: %s.\n",
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tbl[i].compat, fdt_strerror(off));
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}
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}
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}
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#ifdef CONFIG_SYS_DPAA_FMAN
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static void fdt_fixup_liodn_tbl_fman(void *blob,
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struct fman_liodn_id_table *tbl,
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int sz)
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{
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int i;
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for (i = 0; i < sz; i++) {
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int off;
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if (tbl[i].compat == NULL)
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continue;
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/* Try the new compatible first.
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* If the node is missing, try the old.
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*/
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off = fdt_node_offset_by_compat_reg(blob,
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tbl[i].compat[0], tbl[i].compat_offset);
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if (off < 0)
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off = fdt_node_offset_by_compat_reg(blob,
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tbl[i].compat[1], tbl[i].compat_offset);
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if (off >= 0) {
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off = fdt_setprop(blob, off, "fsl,liodn",
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&tbl[i].id[0],
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sizeof(u32) * tbl[i].num_ids);
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if (off > 0)
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printf("WARNING unable to set fsl,liodn for FMan Port: %s\n",
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fdt_strerror(off));
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} else {
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debug("WARNING: could not set fsl,liodn for FMan Portport: %s.\n",
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fdt_strerror(off));
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}
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}
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}
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#endif
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void fdt_fixup_liodn(void *blob)
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{
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#ifdef CONFIG_SYS_SRIO
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fdt_fixup_srio_liodn(blob, srio_liodn_tbl);
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#endif
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fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
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#ifdef CONFIG_SYS_DPAA_FMAN
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fdt_fixup_liodn_tbl_fman(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
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#if (CONFIG_SYS_NUM_FMAN == 2)
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fdt_fixup_liodn_tbl_fman(blob, fman2_liodn_tbl, fman2_liodn_tbl_sz);
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#endif
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#endif
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fdt_fixup_liodn_tbl(blob, sec_liodn_tbl, sec_liodn_tbl_sz);
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#ifdef CONFIG_SYS_FSL_RAID_ENGINE
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fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz);
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#endif
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#ifdef CONFIG_SYS_DPAA_RMAN
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fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz);
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#endif
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ccsr_pcix_t *pcix = (ccsr_pcix_t *)CONFIG_SYS_PCIE1_ADDR;
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int pci_ver = pcix->ipver1 & 0xffff, liodn_base = 0;
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if (pci_ver >= 0x0204) {
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if (pci_ver >= 0x0300)
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liodn_base = 1024;
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else
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liodn_base = 256;
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}
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if (liodn_base) {
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char compat[32];
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sprintf(compat, "fsl,qoriq-pcie-v%d.%d",
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(pci_ver & 0xff00) >> 8, pci_ver & 0xff);
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fdt_fixup_pci_liodn_offsets(blob, compat, liodn_base);
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fdt_fixup_pci_liodn_offsets(blob, "fsl,qoriq-pcie", liodn_base);
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}
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}
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