mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-08 14:14:32 +00:00
0a05bf42b4
The DB-88F6820-AMC connects ethernet@34000 and ethernet@70000 which are labeled as eth2 and eth0 in armada-38x.dts. The ethernet@30000 (eth1) is not used on the AMC board. This eliminates the following bootup message Device 'ethernet@70000': seq 0 is in use by 'ethernet@34000' Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
166 lines
3.9 KiB
Text
166 lines
3.9 KiB
Text
/*
|
|
* Device Tree file for Marvell Armada 385 development board
|
|
* (DB-88F6820-AMC)
|
|
*
|
|
* Copyright (C) 2014 Marvell
|
|
*
|
|
* Gregory CLEMENT <gregory.clement@free-electrons.com>
|
|
*
|
|
* This file is dual-licensed: you can use it either under the terms
|
|
* of the GPL or the X11 license, at your option. Note that this dual
|
|
* licensing only applies to this file, and not this project as a
|
|
* whole.
|
|
*
|
|
* a) This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without
|
|
* any warranty of any kind, whether express or implied.
|
|
*
|
|
* Or, alternatively,
|
|
*
|
|
* b) Permission is hereby granted, free of charge, to any person
|
|
* obtaining a copy of this software and associated documentation
|
|
* files (the "Software"), to deal in the Software without
|
|
* restriction, including without limitation the rights to use,
|
|
* copy, modify, merge, publish, distribute, sublicense, and/or
|
|
* sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following
|
|
* conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be
|
|
* included in all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
|
|
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
|
|
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
|
|
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
|
|
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
|
|
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
|
|
* OTHER DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
/dts-v1/;
|
|
#include "armada-385.dtsi"
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
|
|
/ {
|
|
model = "Marvell Armada 385 AMC";
|
|
compatible = "marvell,a385-amc", "marvell,armada385", "marvell,armada380";
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
aliases {
|
|
ethernet0 = ð0;
|
|
ethernet1 = ð2;
|
|
i2c0 = &i2c0;
|
|
spi1 = &spi1;
|
|
};
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x00000000 0x80000000>; /* 2 GB */
|
|
};
|
|
|
|
soc {
|
|
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
|
|
MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
|
|
|
|
internal-regs {
|
|
i2c@11000 {
|
|
clock-frequency = <100000>;
|
|
u-boot,i2c-slave-addr = <0x0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
serial@12000 {
|
|
/*
|
|
* Exported on the micro USB connector CON16
|
|
* through an FTDI
|
|
*/
|
|
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&uart0_pins>;
|
|
status = "okay";
|
|
u-boot,dm-pre-reloc;
|
|
};
|
|
|
|
ethernet@34000 {
|
|
status = "okay";
|
|
phy = <&phy1>;
|
|
phy-mode = "sgmii";
|
|
};
|
|
|
|
usb@58000 {
|
|
status = "okay";
|
|
};
|
|
|
|
ethernet@70000 {
|
|
pinctrl-names = "default";
|
|
/*
|
|
* The Reference Clock 0 is used to provide a
|
|
* clock to the PHY
|
|
*/
|
|
pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
|
|
status = "okay";
|
|
phy = <&phy0>;
|
|
phy-mode = "rgmii-id";
|
|
};
|
|
|
|
|
|
mdio@72004 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&mdio_pins>;
|
|
|
|
phy0: ethernet-phy@1 {
|
|
reg = <1>;
|
|
};
|
|
|
|
phy1: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
flash@d0000 {
|
|
status = "okay";
|
|
num-cs = <1>;
|
|
marvell,nand-keep-config;
|
|
marvell,nand-enable-arbiter;
|
|
nand-on-flash-bbt;
|
|
};
|
|
};
|
|
|
|
pcie-controller {
|
|
status = "okay";
|
|
pcie@1,0 {
|
|
/* Port 0, Lane 0 */
|
|
status = "okay";
|
|
};
|
|
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi1_pins>;
|
|
status = "okay";
|
|
u-boot,dm-pre-reloc;
|
|
|
|
spi-flash@0 {
|
|
u-boot,dm-pre-reloc;
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
compatible = "st,m25p128", "jedec,spi-nor", "spi-flash";
|
|
reg = <0>; /* Chip select 0 */
|
|
spi-max-frequency = <50000000>;
|
|
m25p,fast-read;
|
|
};
|
|
};
|
|
|
|
&refclk {
|
|
clock-frequency = <20000000>;
|
|
};
|