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7262ff7e56
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears incorrect. Without this delays in R5 SPL are 10x off. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> |
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arc | ||
arm | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
powerpc | ||
riscv | ||
sandbox | ||
sh | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig | ||
u-boot-elf.lds |