mirror of
https://github.com/AsahiLinux/u-boot
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65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Based on the DA8xx "glue layer" code.
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* Copyright (c) 2008-2019, MontaVista Software, Inc. <source@mvista.com>
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*
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* DT support added by: Adam Ford <aford173@gmail.com>
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*/
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#include <common.h>
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#include <dm.h>
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#include <log.h>
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#include <dm/device-internal.h>
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#include <dm/lists.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/da8xx-usb.h>
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#include <asm/io.h>
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#include <generic-phy.h>
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static int da8xx_usb_phy_power_on(struct phy *phy)
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{
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unsigned long timeout;
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clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
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CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN |
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CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ,
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CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN |
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CFGCHIP2_PHY_PLLON | CFGCHIP2_REFFREQ_24MHZ);
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/* wait until the usb phy pll locks */
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timeout = get_timer(0);
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while (get_timer(timeout) < 10) {
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if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD)
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return 0;
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}
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debug("Phy was not turned on\n");
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return -ENODEV;
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}
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static int da8xx_usb_phy_power_off(struct phy *phy)
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{
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clrsetbits_le32(&davinci_syscfg_regs->cfgchip2,
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CFGCHIP2_PHY_PLLON,
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CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN);
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return 0;
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}
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static const struct udevice_id da8xx_phy_ids[] = {
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{ .compatible = "ti,da830-usb-phy" },
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{ }
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};
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static struct phy_ops da8xx_phy_ops = {
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.power_on = da8xx_usb_phy_power_on,
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.power_off = da8xx_usb_phy_power_off,
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};
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U_BOOT_DRIVER(da8xx_phy) = {
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.name = "da8xx-usb-phy",
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.id = UCLASS_PHY,
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.of_match = da8xx_phy_ids,
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.ops = &da8xx_phy_ops,
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};
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