mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-12 22:33:18 +00:00
6706b115a6
This patch adds a driver for VSC9953 L2 Switch. This Vitesse IP is integrated in Freescale T1040 and T1020 SoCs. The L2 switch has 10 Ethernet ports: 2 internal fixed-links (ports 8 and 9) at 2.5 Gbps and and 8 external ports at 1 Gbps. The external ports may be connected to PHYs over QSGMII and SGMII. Commands have also been added to enable/disable a port and to check a port's link speed, duplexity and status. The commands are: ethsw port <port_nr> enable|disable - enable/disable an l2 switch port ethsw port <port_nr> show - show an l2 switch port's configuration port_nr=0..9; use "all" for all ports For more detailse please see doc/README.t1040-l2switch Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
497 lines
12 KiB
C
497 lines
12 KiB
C
/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Driver for the Vitesse VSC9953 L2 Switch
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*/
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#include <asm/io.h>
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#include <asm/fsl_serdes.h>
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#include <fm_eth.h>
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#include <asm/fsl_memac.h>
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#include <vsc9953.h>
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static struct vsc9953_info vsc9953_l2sw = {
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.port[0] = VSC9953_PORT_INFO_INITIALIZER(0),
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.port[1] = VSC9953_PORT_INFO_INITIALIZER(1),
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.port[2] = VSC9953_PORT_INFO_INITIALIZER(2),
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.port[3] = VSC9953_PORT_INFO_INITIALIZER(3),
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.port[4] = VSC9953_PORT_INFO_INITIALIZER(4),
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.port[5] = VSC9953_PORT_INFO_INITIALIZER(5),
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.port[6] = VSC9953_PORT_INFO_INITIALIZER(6),
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.port[7] = VSC9953_PORT_INFO_INITIALIZER(7),
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.port[8] = VSC9953_PORT_INFO_INITIALIZER(8),
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.port[9] = VSC9953_PORT_INFO_INITIALIZER(9),
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};
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void vsc9953_port_info_set_mdio(int port, struct mii_dev *bus)
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{
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if (!VSC9953_PORT_CHECK(port))
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return;
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vsc9953_l2sw.port[port].bus = bus;
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}
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void vsc9953_port_info_set_phy_address(int port, int address)
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{
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if (!VSC9953_PORT_CHECK(port))
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return;
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vsc9953_l2sw.port[port].phyaddr = address;
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}
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void vsc9953_port_info_set_phy_int(int port, phy_interface_t phy_int)
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{
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if (!VSC9953_PORT_CHECK(port))
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return;
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vsc9953_l2sw.port[port].enet_if = phy_int;
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}
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void vsc9953_port_enable(int port)
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{
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if (!VSC9953_PORT_CHECK(port))
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return;
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vsc9953_l2sw.port[port].enabled = 1;
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}
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void vsc9953_port_disable(int port)
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{
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if (!VSC9953_PORT_CHECK(port))
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return;
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vsc9953_l2sw.port[port].enabled = 0;
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}
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static void vsc9953_mdio_write(struct vsc9953_mii_mng *phyregs, int port_addr,
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int regnum, int value)
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{
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int timeout = 50000;
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out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
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((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
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(0x1 << 1));
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asm("sync");
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while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
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udelay(1);
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if (timeout == 0)
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debug("Timeout waiting for MDIO write\n");
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}
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static int vsc9953_mdio_read(struct vsc9953_mii_mng *phyregs, int port_addr,
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int regnum)
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{
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int value = 0xFFFF;
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int timeout = 50000;
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while ((in_le32(&phyregs->miimstatus) & MIIMIND_OPR_PEND) && --timeout)
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udelay(1);
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if (timeout == 0) {
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debug("Timeout waiting for MDIO operation to finish\n");
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return value;
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}
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/* Put the address of the phy, and the register
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* number into MIICMD
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*/
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out_le32(&phyregs->miimcmd, (0x1 << 31) | ((port_addr & 0x1f) << 25) |
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((regnum & 0x1f) << 20) | ((value & 0xffff) << 4) |
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(0x2 << 1));
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timeout = 50000;
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/* Wait for the the indication that the read is done */
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while ((in_le32(&phyregs->miimstatus) & 0x8) && --timeout)
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udelay(1);
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if (timeout == 0)
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debug("Timeout waiting for MDIO read\n");
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/* Grab the value read from the PHY */
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value = in_le32(&phyregs->miimdata);
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if ((value & 0x00030000) == 0)
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return value & 0x0000ffff;
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return value;
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}
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static int init_phy(struct eth_device *dev)
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{
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struct vsc9953_port_info *l2sw_port = dev->priv;
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struct phy_device *phydev = NULL;
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#ifdef CONFIG_PHYLIB
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if (!l2sw_port->bus)
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return 0;
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phydev = phy_connect(l2sw_port->bus, l2sw_port->phyaddr, dev,
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l2sw_port->enet_if);
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if (!phydev) {
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printf("Failed to connect\n");
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return -1;
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}
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phydev->supported &= SUPPORTED_10baseT_Half |
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SUPPORTED_10baseT_Full |
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SUPPORTED_100baseT_Half |
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SUPPORTED_100baseT_Full |
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SUPPORTED_1000baseT_Full;
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phydev->advertising = phydev->supported;
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l2sw_port->phydev = phydev;
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phy_config(phydev);
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#endif
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return 0;
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}
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static int vsc9953_port_init(int port)
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{
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struct eth_device *dev;
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/* Internal ports never have a PHY */
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if (VSC9953_INTERNAL_PORT_CHECK(port))
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return 0;
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/* alloc eth device */
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dev = (struct eth_device *)calloc(1, sizeof(struct eth_device));
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if (!dev)
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return 1;
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sprintf(dev->name, "SW@PORT%d", port);
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dev->priv = &vsc9953_l2sw.port[port];
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dev->init = NULL;
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dev->halt = NULL;
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dev->send = NULL;
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dev->recv = NULL;
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if (init_phy(dev)) {
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free(dev);
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return 1;
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}
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return 0;
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}
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void vsc9953_init(bd_t *bis)
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{
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u32 i, hdx_cfg = 0, phy_addr = 0;
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int timeout;
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struct vsc9953_system_reg *l2sys_reg;
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struct vsc9953_qsys_reg *l2qsys_reg;
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struct vsc9953_dev_gmii *l2dev_gmii_reg;
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struct vsc9953_analyzer *l2ana_reg;
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struct vsc9953_devcpu_gcb *l2dev_gcb;
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l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(VSC9953_OFFSET +
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VSC9953_DEV_GMII_OFFSET);
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l2ana_reg = (struct vsc9953_analyzer *)(VSC9953_OFFSET +
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VSC9953_ANA_OFFSET);
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l2sys_reg = (struct vsc9953_system_reg *)(VSC9953_OFFSET +
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VSC9953_SYS_OFFSET);
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l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
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VSC9953_QSYS_OFFSET);
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l2dev_gcb = (struct vsc9953_devcpu_gcb *)(VSC9953_OFFSET +
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VSC9953_DEVCPU_GCB);
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out_le32(&l2dev_gcb->chip_regs.soft_rst,
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CONFIG_VSC9953_SOFT_SWC_RST_ENA);
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timeout = 50000;
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while ((in_le32(&l2dev_gcb->chip_regs.soft_rst) &
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CONFIG_VSC9953_SOFT_SWC_RST_ENA) && --timeout)
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udelay(1); /* busy wait for vsc9953 soft reset */
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if (timeout == 0)
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debug("Timeout waiting for VSC9953 to reset\n");
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out_le32(&l2sys_reg->sys.reset_cfg, CONFIG_VSC9953_MEM_ENABLE |
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CONFIG_VSC9953_MEM_INIT);
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timeout = 50000;
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while ((in_le32(&l2sys_reg->sys.reset_cfg) &
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CONFIG_VSC9953_MEM_INIT) && --timeout)
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udelay(1); /* busy wait for vsc9953 memory init */
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if (timeout == 0)
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debug("Timeout waiting for VSC9953 memory to initialize\n");
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out_le32(&l2sys_reg->sys.reset_cfg, (in_le32(&l2sys_reg->sys.reset_cfg)
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| CONFIG_VSC9953_CORE_ENABLE));
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/* VSC9953 Setting to be done once only */
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out_le32(&l2qsys_reg->sys.ext_cpu_cfg, 0x00000b00);
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for (i = 0; i < VSC9953_MAX_PORTS; i++) {
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if (vsc9953_port_init(i))
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printf("Failed to initialize l2switch port %d\n", i);
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/* Enable VSC9953 GMII Ports Port ID 0 - 7 */
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if (VSC9953_INTERNAL_PORT_CHECK(i)) {
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out_le32(&l2ana_reg->pfc[i].pfc_cfg,
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CONFIG_VSC9953_PFC_FC_QSGMII);
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out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
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CONFIG_VSC9953_MAC_FC_CFG_QSGMII);
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} else {
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out_le32(&l2ana_reg->pfc[i].pfc_cfg,
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CONFIG_VSC9953_PFC_FC);
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out_le32(&l2sys_reg->pause_cfg.mac_fc_cfg[i],
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CONFIG_VSC9953_MAC_FC_CFG);
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}
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out_le32(&l2dev_gmii_reg->port_mode.clock_cfg,
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CONFIG_VSC9953_CLOCK_CFG);
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out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ena_cfg,
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CONFIG_VSC9953_MAC_ENA_CFG);
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out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_mode_cfg,
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CONFIG_VSC9953_MAC_MODE_CFG);
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out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_ifg_cfg,
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CONFIG_VSC9953_MAC_IFG_CFG);
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/* mac_hdx_cfg varies with port id*/
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hdx_cfg = (CONFIG_VSC9953_MAC_HDX_CFG | (i << 16));
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out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_hdx_cfg, hdx_cfg);
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out_le32(&l2sys_reg->sys.front_port_mode[i],
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CONFIG_VSC9953_FRONT_PORT_MODE);
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out_le32(&l2qsys_reg->sys.switch_port_mode[i],
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CONFIG_VSC9953_PORT_ENA);
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out_le32(&l2dev_gmii_reg->mac_cfg_status.mac_maxlen_cfg,
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CONFIG_VSC9953_MAC_MAX_LEN);
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out_le32(&l2sys_reg->pause_cfg.pause_cfg[i],
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CONFIG_VSC9953_PAUSE_CFG);
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/* WAIT FOR 2 us*/
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udelay(2);
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l2dev_gmii_reg = (struct vsc9953_dev_gmii *)(
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(char *)l2dev_gmii_reg
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+ T1040_SWITCH_GMII_DEV_OFFSET);
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/* Initialize Lynx PHY Wrappers */
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phy_addr = 0;
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if (vsc9953_l2sw.port[i].enet_if ==
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PHY_INTERFACE_MODE_QSGMII)
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phy_addr = (i + 0x4) & 0x1F;
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else if (vsc9953_l2sw.port[i].enet_if ==
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PHY_INTERFACE_MODE_SGMII)
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phy_addr = (i + 1) & 0x1F;
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if (phy_addr) {
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/* SGMII IF mode + AN enable */
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vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
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0x14, PHY_SGMII_IF_MODE_AN |
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PHY_SGMII_IF_MODE_SGMII);
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/* Dev ability according to SGMII specification */
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vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
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0x4, PHY_SGMII_DEV_ABILITY_SGMII);
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/* Adjust link timer for SGMII
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* 1.6 ms in units of 8 ns = 2 * 10^5 = 0x30d40
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*/
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vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
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0x13, 0x0003);
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vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
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0x12, 0x0d40);
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/* Restart AN */
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vsc9953_mdio_write(&l2dev_gcb->mii_mng[0], phy_addr,
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0x0, PHY_SGMII_CR_DEF_VAL |
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PHY_SGMII_CR_RESET_AN);
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timeout = 50000;
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while ((vsc9953_mdio_read(&l2dev_gcb->mii_mng[0],
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phy_addr, 0x01) & 0x0020) && --timeout)
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udelay(1); /* wait for AN to complete */
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if (timeout == 0)
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debug("Timeout waiting for AN to complete\n");
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}
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}
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printf("VSC9953 L2 switch initialized\n");
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return;
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}
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#ifdef CONFIG_VSC9953_CMD
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/* Enable/disable status of a VSC9953 port */
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static void vsc9953_port_status_set(int port_nr, u8 enabled)
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{
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u32 val;
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struct vsc9953_qsys_reg *l2qsys_reg;
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/* Administrative down */
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if (vsc9953_l2sw.port[port_nr].enabled == 0)
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return;
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l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
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VSC9953_QSYS_OFFSET);
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val = in_le32(&l2qsys_reg->sys.switch_port_mode[port_nr]);
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if (enabled == 1)
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val |= (1 << 13);
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else
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val &= ~(1 << 13);
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out_le32(&l2qsys_reg->sys.switch_port_mode[port_nr], val);
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}
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/* Set all VSC9953 ports' status */
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static void vsc9953_port_all_status_set(u8 enabled)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_status_set(i, enabled);
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}
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/* Start autonegotiation for a VSC9953 PHY */
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static void vsc9953_phy_autoneg(int port_nr)
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{
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if (!vsc9953_l2sw.port[port_nr].phydev)
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return;
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if (vsc9953_l2sw.port[port_nr].phydev->drv->startup(
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vsc9953_l2sw.port[port_nr].phydev))
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printf("Failed to start PHY for port %d\n", port_nr);
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}
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/* Start autonegotiation for all VSC9953 PHYs */
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static void vsc9953_phy_all_autoneg(void)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_phy_autoneg(i);
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}
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/* Print a VSC9953 port's configuration */
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static void vsc9953_port_config_show(int port)
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{
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int speed;
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int duplex;
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int link;
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u8 enabled;
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u32 val;
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struct vsc9953_qsys_reg *l2qsys_reg;
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l2qsys_reg = (struct vsc9953_qsys_reg *)(VSC9953_OFFSET +
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VSC9953_QSYS_OFFSET);
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val = in_le32(&l2qsys_reg->sys.switch_port_mode[port]);
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enabled = vsc9953_l2sw.port[port].enabled &
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((val & 0x00002000) >> 13);
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/* internal ports (8 and 9) are fixed */
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if (VSC9953_INTERNAL_PORT_CHECK(port)) {
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link = 1;
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speed = SPEED_2500;
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duplex = DUPLEX_FULL;
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} else {
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if (vsc9953_l2sw.port[port].phydev) {
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link = vsc9953_l2sw.port[port].phydev->link;
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speed = vsc9953_l2sw.port[port].phydev->speed;
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duplex = vsc9953_l2sw.port[port].phydev->duplex;
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} else {
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link = -1;
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speed = -1;
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duplex = -1;
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}
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}
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printf("%8d ", port);
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printf("%8s ", enabled == 1 ? "enabled" : "disabled");
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printf("%8s ", link == 1 ? "up" : "down");
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switch (speed) {
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case SPEED_10:
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printf("%8d ", 10);
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break;
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case SPEED_100:
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printf("%8d ", 100);
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break;
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case SPEED_1000:
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printf("%8d ", 1000);
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break;
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case SPEED_2500:
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printf("%8d ", 2500);
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break;
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case SPEED_10000:
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printf("%8d ", 10000);
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break;
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default:
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printf("%8s ", "-");
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}
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printf("%8s\n", duplex == DUPLEX_FULL ? "full" : "half");
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}
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/* Print VSC9953 ports' configuration */
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static void vsc9953_port_all_config_show(void)
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{
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int i;
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for (i = 0; i < VSC9953_MAX_PORTS; i++)
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vsc9953_port_config_show(i);
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}
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/* function to interpret commands starting with "ethsw " */
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static int do_ethsw(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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u8 enable;
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u32 port;
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if (argc < 4)
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return -1;
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if (strcmp(argv[1], "port"))
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return -1;
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if (!strcmp(argv[3], "show")) {
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if (!strcmp(argv[2], "all")) {
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vsc9953_phy_all_autoneg();
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printf("%8s %8s %8s %8s %8s\n",
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"Port", "Status", "Link", "Speed",
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"Duplex");
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vsc9953_port_all_config_show();
|
|
return 0;
|
|
} else {
|
|
port = simple_strtoul(argv[2], NULL, 10);
|
|
if (!VSC9953_PORT_CHECK(port))
|
|
return -1;
|
|
vsc9953_phy_autoneg(port);
|
|
printf("%8s %8s %8s %8s %8s\n",
|
|
"Port", "Status", "Link", "Speed",
|
|
"Duplex");
|
|
vsc9953_port_config_show(port);
|
|
return 0;
|
|
}
|
|
} else if (!strcmp(argv[3], "enable")) {
|
|
enable = 1;
|
|
} else if (!strcmp(argv[3], "disable")) {
|
|
enable = 0;
|
|
} else {
|
|
return -1;
|
|
}
|
|
|
|
if (!strcmp(argv[2], "all")) {
|
|
vsc9953_port_all_status_set(enable);
|
|
return 0;
|
|
} else {
|
|
port = simple_strtoul(argv[2], NULL, 10);
|
|
if (!VSC9953_PORT_CHECK(port))
|
|
return -1;
|
|
vsc9953_port_status_set(port, enable);
|
|
return 0;
|
|
}
|
|
|
|
return -1;
|
|
}
|
|
|
|
U_BOOT_CMD(ethsw, 5, 0, do_ethsw,
|
|
"vsc9953 l2 switch commands",
|
|
"port <port_nr> enable|disable\n"
|
|
" - enable/disable an l2 switch port\n"
|
|
" port_nr=0..9; use \"all\" for all ports\n"
|
|
"ethsw port <port_nr> show\n"
|
|
" - show an l2 switch port's configuration\n"
|
|
" port_nr=0..9; use \"all\" for all ports\n"
|
|
);
|
|
#endif /* CONFIG_VSC9953_CMD */
|