mirror of
https://github.com/AsahiLinux/u-boot
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571c49789d
Sync the serial nodes of the LS1088A based boards with their representation in Linux. We also imported the clockgen and sysclk nodes which are dependencies. Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
379 lines
6.4 KiB
Text
379 lines
6.4 KiB
Text
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Device Tree file for Travese Ten64 (LS1088) board
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* Based on fsl-ls1088a-rdb.dts
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* Copyright 2017-2020 NXP
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* Copyright 2019-2021 Traverse Technologies
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*
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* Author: Mathew McBride <matt@traverse.com.au>
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*/
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/dts-v1/;
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#include "fsl-ls1088a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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model = "Traverse Ten64";
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compatible = "traverse,ten64", "fsl,ls1088a";
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aliases {
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serial0 = &duart0;
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serial1 = &duart1;
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spi0 = &qspi;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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buttons {
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compatible = "gpio-keys";
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/* Fired by system controller when
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* external power off (e.g ATX Power Button)
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* asserted
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*/
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powerdn {
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label = "External Power Down";
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gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
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interrupts = <&gpio1 17 IRQ_TYPE_EDGE_FALLING>;
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linux,code = <KEY_POWER>;
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};
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/* Rear Panel 'ADMIN' button (GPIO_H) */
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admin {
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label = "ADMIN button";
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gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
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interrupts = <&gpio3 8 IRQ_TYPE_EDGE_RISING>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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sfp1down {
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label = "ten64:green:sfp1:down";
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gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
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};
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sfp2up {
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label = "ten64:green:sfp2:up";
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gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
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};
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admin {
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label = "ten64:admin";
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gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
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};
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};
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sfp_xg0: dpmac2-sfp {
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compatible = "sff,sfp";
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i2c-bus = <&sfplower_i2c>;
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tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&sfpgpio 2 GPIO_ACTIVE_LOW>;
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los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <2000>;
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};
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sfp_xg1: dpmac1-sfp {
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compatible = "sff,sfp";
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i2c-bus = <&sfpupper_i2c>;
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tx-fault-gpios = <&sfpgpio 4 GPIO_ACTIVE_HIGH>;
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tx-disable-gpios = <&sfpgpio 5 GPIO_ACTIVE_HIGH>;
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mod-def0-gpios = <&sfpgpio 6 GPIO_ACTIVE_LOW>;
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los-gpios = <&sfpgpio 7 GPIO_ACTIVE_HIGH>;
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maximum-power-milliwatt = <2000>;
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};
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};
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/* XG1 - Upper SFP */
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&dpmac1 {
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sfp = <&sfp_xg1>;
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phy-connection-type = "10gbase-r";
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managed = "in-band-status";
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status = "okay";
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};
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/* XG0 - Lower SFP */
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&dpmac2 {
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sfp = <&sfp_xg0>;
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phy-connection-type = "10gbase-r";
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managed = "in-band-status";
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status = "okay";
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};
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/* DPMAC3..6 is GE4 to GE8 */
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&dpmac3 {
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phy-handle = <&mdio1_phy5>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac4 {
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phy-handle = <&mdio1_phy6>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac5 {
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phy-handle = <&mdio1_phy7>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac6 {
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phy-handle = <&mdio1_phy8>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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/* DPMAC7..10 is GE0 to GE3 */
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&dpmac7 {
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phy-handle = <&mdio1_phy1>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac8 {
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phy-handle = <&mdio1_phy2>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac9 {
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phy-handle = <&mdio1_phy3>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&dpmac10 {
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phy-handle = <&mdio1_phy4>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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status = "okay";
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};
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&duart0 {
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status = "okay";
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};
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&duart1 {
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status = "okay";
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};
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&emdio1 {
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status = "okay";
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mdio1_phy5: ethernet-phy@c {
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reg = <0xc>;
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};
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mdio1_phy6: ethernet-phy@d {
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reg = <0xd>;
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};
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mdio1_phy7: ethernet-phy@e {
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reg = <0xe>;
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};
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mdio1_phy8: ethernet-phy@f {
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reg = <0xf>;
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};
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mdio1_phy1: ethernet-phy@1c {
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reg = <0x1c>;
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};
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mdio1_phy2: ethernet-phy@1d {
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reg = <0x1d>;
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};
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mdio1_phy3: ethernet-phy@1e {
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reg = <0x1e>;
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};
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mdio1_phy4: ethernet-phy@1f {
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reg = <0x1f>;
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};
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};
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&esdhc {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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sfpgpio: gpio@76 {
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compatible = "ti,tca9539";
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reg = <0x76>;
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#gpio-cells = <2>;
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gpio-controller;
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admin_led_lower {
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gpio-hog;
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gpios = <13 GPIO_ACTIVE_HIGH>;
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output-low;
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};
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};
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at97sc: tpm@29 {
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compatible = "atmel,at97sc3204t";
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reg = <0x29>;
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};
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uc: board-controller@7e {
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compatible = "traverse,ten64-controller";
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reg = <0x7e>;
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};
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};
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&i2c2 {
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status = "okay";
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rx8035: rtc@32 {
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compatible = "epson,rx8035";
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reg = <0x32>;
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};
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};
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&i2c3 {
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status = "okay";
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i2c-switch@70 {
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compatible = "nxp,pca9540";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x70>;
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sfpupper_i2c: i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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};
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sfplower_i2c: i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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};
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};
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};
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&qspi {
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status = "okay";
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en25s64: flash@0 {
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compatible = "jedec,spi-nor";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0 0x100000>;
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};
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partition@100000 {
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label = "bl3";
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reg = <0x100000 0x200000>;
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};
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partition@300000 {
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label = "mcfirmware";
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reg = <0x300000 0x200000>;
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};
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partition@500000 {
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label = "ubootenv";
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reg = <0x500000 0x80000>;
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};
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partition@580000 {
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label = "dpl";
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reg = <0x580000 0x40000>;
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};
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partition@5C0000 {
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label = "dpc";
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reg = <0x5C0000 0x40000>;
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};
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partition@600000 {
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label = "devicetree";
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reg = <0x600000 0x40000>;
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};
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};
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};
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nand: flash@1 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <1>;
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spi-max-frequency = <20000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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/* reserved for future boot direct from NAND flash
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* (this would use the same layout as the 8MiB NOR flash)
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*/
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partition@0 {
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label = "nand-boot-reserved";
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reg = <0 0x800000>;
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};
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/* recovery / install environment */
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partition@800000 {
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label = "recovery";
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reg = <0x800000 0x2000000>;
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};
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/* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
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partition@2800000 {
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label = "ubia";
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reg = <0x2800000 0x6C00000>;
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};
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/* ubib (second OpenWrt) */
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partition@9400000 {
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label = "ubib";
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reg = <0x9400000 0x6C00000>;
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};
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};
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};
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};
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&usb0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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