mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-05 20:54:31 +00:00
63c0941726
Commit e2f88dfd2d
("libfdt: Introduce new ARCH_FIXUP_FDT option")
allows us to skip memory setup of DTB, but a problem for ARM is that
spin_table_update_dt() and psci_update_dt() are skipped as well if
CONFIG_ARCH_FIXUP_FDT is disabled.
This commit allows us to skip only fdt_fixup_memory_banks() instead
of the whole of arch_fixup_fdt(). It will be useful when we want to
use a memory node from a kernel DTB as is, but need some fixups for
Spin-Table/PSCI.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Simon Glass <sjg@chromium.org>
Fixed build error for x86:
Signed-off-by: Simon Glass <sjg@chromium.org>
1739 lines
42 KiB
C
1739 lines
42 KiB
C
/*
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* (C) Copyright 2007
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* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
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*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <inttypes.h>
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#include <stdio_dev.h>
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#include <linux/ctype.h>
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#include <linux/types.h>
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#include <asm/global_data.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <exports.h>
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#include <fdtdec.h>
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/**
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* fdt_getprop_u32_default_node - Return a node's property or a default
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*
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* @fdt: ptr to device tree
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* @off: offset of node
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* @cell: cell offset in property
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* @prop: property name
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* @dflt: default value if the property isn't found
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*
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* Convenience function to return a node's property or a default value if
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* the property doesn't exist.
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*/
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u32 fdt_getprop_u32_default_node(const void *fdt, int off, int cell,
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const char *prop, const u32 dflt)
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{
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const fdt32_t *val;
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int len;
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val = fdt_getprop(fdt, off, prop, &len);
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/* Check if property exists */
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if (!val)
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return dflt;
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/* Check if property is long enough */
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if (len < ((cell + 1) * sizeof(uint32_t)))
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return dflt;
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return fdt32_to_cpu(*val);
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}
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/**
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* fdt_getprop_u32_default - Find a node and return it's property or a default
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*
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* @fdt: ptr to device tree
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* @path: path of node
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* @prop: property name
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* @dflt: default value if the property isn't found
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*
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* Convenience function to find a node and return it's property or a
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* default value if it doesn't exist.
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*/
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u32 fdt_getprop_u32_default(const void *fdt, const char *path,
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const char *prop, const u32 dflt)
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{
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int off;
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off = fdt_path_offset(fdt, path);
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if (off < 0)
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return dflt;
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return fdt_getprop_u32_default_node(fdt, off, 0, prop, dflt);
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}
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/**
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* fdt_find_and_setprop: Find a node and set it's property
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*
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* @fdt: ptr to device tree
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* @node: path of node
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* @prop: property name
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* @val: ptr to new value
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* @len: length of new property value
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* @create: flag to create the property if it doesn't exist
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*
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* Convenience function to directly set a property given the path to the node.
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*/
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int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
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const void *val, int len, int create)
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{
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int nodeoff = fdt_path_offset(fdt, node);
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if (nodeoff < 0)
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return nodeoff;
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if ((!create) && (fdt_get_property(fdt, nodeoff, prop, NULL) == NULL))
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return 0; /* create flag not set; so exit quietly */
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return fdt_setprop(fdt, nodeoff, prop, val, len);
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}
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/**
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* fdt_find_or_add_subnode() - find or possibly add a subnode of a given node
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*
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* @fdt: pointer to the device tree blob
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* @parentoffset: structure block offset of a node
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* @name: name of the subnode to locate
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*
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* fdt_subnode_offset() finds a subnode of the node with a given name.
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* If the subnode does not exist, it will be created.
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*/
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int fdt_find_or_add_subnode(void *fdt, int parentoffset, const char *name)
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{
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int offset;
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offset = fdt_subnode_offset(fdt, parentoffset, name);
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if (offset == -FDT_ERR_NOTFOUND)
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offset = fdt_add_subnode(fdt, parentoffset, name);
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if (offset < 0)
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printf("%s: %s: %s\n", __func__, name, fdt_strerror(offset));
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return offset;
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}
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/* rename to CONFIG_OF_STDOUT_PATH ? */
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#if defined(OF_STDOUT_PATH)
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static int fdt_fixup_stdout(void *fdt, int chosenoff)
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{
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return fdt_setprop(fdt, chosenoff, "linux,stdout-path",
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OF_STDOUT_PATH, strlen(OF_STDOUT_PATH) + 1);
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}
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#elif defined(CONFIG_OF_STDOUT_VIA_ALIAS) && defined(CONFIG_CONS_INDEX)
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static int fdt_fixup_stdout(void *fdt, int chosenoff)
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{
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int err;
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int aliasoff;
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char sername[9] = { 0 };
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const void *path;
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int len;
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char tmp[256]; /* long enough */
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sprintf(sername, "serial%d", CONFIG_CONS_INDEX - 1);
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aliasoff = fdt_path_offset(fdt, "/aliases");
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if (aliasoff < 0) {
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err = aliasoff;
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goto noalias;
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}
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path = fdt_getprop(fdt, aliasoff, sername, &len);
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if (!path) {
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err = len;
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goto noalias;
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}
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/* fdt_setprop may break "path" so we copy it to tmp buffer */
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memcpy(tmp, path, len);
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err = fdt_setprop(fdt, chosenoff, "linux,stdout-path", tmp, len);
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if (err < 0)
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printf("WARNING: could not set linux,stdout-path %s.\n",
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fdt_strerror(err));
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return err;
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noalias:
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printf("WARNING: %s: could not read %s alias: %s\n",
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__func__, sername, fdt_strerror(err));
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return 0;
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}
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#else
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static int fdt_fixup_stdout(void *fdt, int chosenoff)
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{
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return 0;
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}
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#endif
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static inline int fdt_setprop_uxx(void *fdt, int nodeoffset, const char *name,
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uint64_t val, int is_u64)
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{
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if (is_u64)
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return fdt_setprop_u64(fdt, nodeoffset, name, val);
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else
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return fdt_setprop_u32(fdt, nodeoffset, name, (uint32_t)val);
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}
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int fdt_root(void *fdt)
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{
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char *serial;
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int err;
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err = fdt_check_header(fdt);
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if (err < 0) {
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printf("fdt_root: %s\n", fdt_strerror(err));
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return err;
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}
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serial = getenv("serial#");
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if (serial) {
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err = fdt_setprop(fdt, 0, "serial-number", serial,
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strlen(serial) + 1);
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if (err < 0) {
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printf("WARNING: could not set serial-number %s.\n",
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fdt_strerror(err));
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return err;
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}
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}
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return 0;
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}
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int fdt_initrd(void *fdt, ulong initrd_start, ulong initrd_end)
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{
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int nodeoffset;
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int err, j, total;
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int is_u64;
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uint64_t addr, size;
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/* just return if the size of initrd is zero */
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if (initrd_start == initrd_end)
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return 0;
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/* find or create "/chosen" node. */
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nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen");
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if (nodeoffset < 0)
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return nodeoffset;
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total = fdt_num_mem_rsv(fdt);
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/*
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* Look for an existing entry and update it. If we don't find
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* the entry, we will j be the next available slot.
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*/
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for (j = 0; j < total; j++) {
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err = fdt_get_mem_rsv(fdt, j, &addr, &size);
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if (addr == initrd_start) {
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fdt_del_mem_rsv(fdt, j);
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break;
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}
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}
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err = fdt_add_mem_rsv(fdt, initrd_start, initrd_end - initrd_start);
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if (err < 0) {
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printf("fdt_initrd: %s\n", fdt_strerror(err));
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return err;
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}
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is_u64 = (fdt_address_cells(fdt, 0) == 2);
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err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-start",
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(uint64_t)initrd_start, is_u64);
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if (err < 0) {
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printf("WARNING: could not set linux,initrd-start %s.\n",
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fdt_strerror(err));
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return err;
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}
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err = fdt_setprop_uxx(fdt, nodeoffset, "linux,initrd-end",
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(uint64_t)initrd_end, is_u64);
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if (err < 0) {
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printf("WARNING: could not set linux,initrd-end %s.\n",
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fdt_strerror(err));
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return err;
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}
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return 0;
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}
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int fdt_chosen(void *fdt)
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{
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int nodeoffset;
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int err;
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char *str; /* used to set string properties */
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err = fdt_check_header(fdt);
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if (err < 0) {
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printf("fdt_chosen: %s\n", fdt_strerror(err));
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return err;
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}
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/* find or create "/chosen" node. */
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nodeoffset = fdt_find_or_add_subnode(fdt, 0, "chosen");
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if (nodeoffset < 0)
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return nodeoffset;
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str = getenv("bootargs");
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if (str) {
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err = fdt_setprop(fdt, nodeoffset, "bootargs", str,
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strlen(str) + 1);
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if (err < 0) {
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printf("WARNING: could not set bootargs %s.\n",
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fdt_strerror(err));
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return err;
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}
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}
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return fdt_fixup_stdout(fdt, nodeoffset);
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}
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void do_fixup_by_path(void *fdt, const char *path, const char *prop,
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const void *val, int len, int create)
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{
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#if defined(DEBUG)
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int i;
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debug("Updating property '%s/%s' = ", path, prop);
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for (i = 0; i < len; i++)
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debug(" %.2x", *(u8*)(val+i));
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debug("\n");
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#endif
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int rc = fdt_find_and_setprop(fdt, path, prop, val, len, create);
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if (rc)
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printf("Unable to update property %s:%s, err=%s\n",
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path, prop, fdt_strerror(rc));
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}
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void do_fixup_by_path_u32(void *fdt, const char *path, const char *prop,
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u32 val, int create)
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{
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fdt32_t tmp = cpu_to_fdt32(val);
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do_fixup_by_path(fdt, path, prop, &tmp, sizeof(tmp), create);
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}
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void do_fixup_by_prop(void *fdt,
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const char *pname, const void *pval, int plen,
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const char *prop, const void *val, int len,
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int create)
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{
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int off;
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#if defined(DEBUG)
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int i;
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debug("Updating property '%s' = ", prop);
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for (i = 0; i < len; i++)
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debug(" %.2x", *(u8*)(val+i));
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debug("\n");
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#endif
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off = fdt_node_offset_by_prop_value(fdt, -1, pname, pval, plen);
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while (off != -FDT_ERR_NOTFOUND) {
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if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL))
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fdt_setprop(fdt, off, prop, val, len);
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off = fdt_node_offset_by_prop_value(fdt, off, pname, pval, plen);
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}
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}
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void do_fixup_by_prop_u32(void *fdt,
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const char *pname, const void *pval, int plen,
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const char *prop, u32 val, int create)
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{
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fdt32_t tmp = cpu_to_fdt32(val);
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do_fixup_by_prop(fdt, pname, pval, plen, prop, &tmp, 4, create);
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}
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void do_fixup_by_compat(void *fdt, const char *compat,
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const char *prop, const void *val, int len, int create)
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{
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int off = -1;
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#if defined(DEBUG)
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int i;
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debug("Updating property '%s' = ", prop);
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for (i = 0; i < len; i++)
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debug(" %.2x", *(u8*)(val+i));
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debug("\n");
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#endif
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off = fdt_node_offset_by_compatible(fdt, -1, compat);
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while (off != -FDT_ERR_NOTFOUND) {
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if (create || (fdt_get_property(fdt, off, prop, NULL) != NULL))
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fdt_setprop(fdt, off, prop, val, len);
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off = fdt_node_offset_by_compatible(fdt, off, compat);
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}
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}
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void do_fixup_by_compat_u32(void *fdt, const char *compat,
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const char *prop, u32 val, int create)
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{
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fdt32_t tmp = cpu_to_fdt32(val);
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do_fixup_by_compat(fdt, compat, prop, &tmp, 4, create);
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}
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#ifdef CONFIG_ARCH_FIXUP_FDT_MEMORY
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/*
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* fdt_pack_reg - pack address and size array into the "reg"-suitable stream
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*/
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static int fdt_pack_reg(const void *fdt, void *buf, u64 *address, u64 *size,
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int n)
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{
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int i;
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int address_cells = fdt_address_cells(fdt, 0);
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int size_cells = fdt_size_cells(fdt, 0);
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char *p = buf;
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for (i = 0; i < n; i++) {
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if (address_cells == 2)
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*(fdt64_t *)p = cpu_to_fdt64(address[i]);
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else
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*(fdt32_t *)p = cpu_to_fdt32(address[i]);
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p += 4 * address_cells;
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if (size_cells == 2)
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*(fdt64_t *)p = cpu_to_fdt64(size[i]);
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else
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*(fdt32_t *)p = cpu_to_fdt32(size[i]);
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p += 4 * size_cells;
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}
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return p - (char *)buf;
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}
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#ifdef CONFIG_NR_DRAM_BANKS
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#define MEMORY_BANKS_MAX CONFIG_NR_DRAM_BANKS
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#else
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#define MEMORY_BANKS_MAX 4
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#endif
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int fdt_fixup_memory_banks(void *blob, u64 start[], u64 size[], int banks)
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{
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int err, nodeoffset;
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int len;
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u8 tmp[MEMORY_BANKS_MAX * 16]; /* Up to 64-bit address + 64-bit size */
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if (banks > MEMORY_BANKS_MAX) {
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printf("%s: num banks %d exceeds hardcoded limit %d."
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" Recompile with higher MEMORY_BANKS_MAX?\n",
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__FUNCTION__, banks, MEMORY_BANKS_MAX);
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return -1;
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}
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err = fdt_check_header(blob);
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if (err < 0) {
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printf("%s: %s\n", __FUNCTION__, fdt_strerror(err));
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return err;
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}
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|
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/* find or create "/memory" node. */
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nodeoffset = fdt_find_or_add_subnode(blob, 0, "memory");
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if (nodeoffset < 0)
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return nodeoffset;
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err = fdt_setprop(blob, nodeoffset, "device_type", "memory",
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sizeof("memory"));
|
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if (err < 0) {
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printf("WARNING: could not set %s %s.\n", "device_type",
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fdt_strerror(err));
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return err;
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}
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if (!banks)
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return 0;
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len = fdt_pack_reg(blob, tmp, start, size, banks);
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err = fdt_setprop(blob, nodeoffset, "reg", tmp, len);
|
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if (err < 0) {
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printf("WARNING: could not set %s %s.\n",
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"reg", fdt_strerror(err));
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return err;
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}
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return 0;
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}
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#endif
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int fdt_fixup_memory(void *blob, u64 start, u64 size)
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{
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return fdt_fixup_memory_banks(blob, &start, &size, 1);
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}
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|
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void fdt_fixup_ethernet(void *fdt)
|
|
{
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int i, j, prop;
|
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char *tmp, *end;
|
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char mac[16];
|
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const char *path;
|
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unsigned char mac_addr[6];
|
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int offset;
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|
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if (fdt_path_offset(fdt, "/aliases") < 0)
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return;
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|
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/* Cycle through all aliases */
|
|
for (prop = 0; ; prop++) {
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const char *name;
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int len = strlen("ethernet");
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|
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/* FDT might have been edited, recompute the offset */
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offset = fdt_first_property_offset(fdt,
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fdt_path_offset(fdt, "/aliases"));
|
|
/* Select property number 'prop' */
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for (i = 0; i < prop; i++)
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offset = fdt_next_property_offset(fdt, offset);
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|
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if (offset < 0)
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break;
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|
|
path = fdt_getprop_by_offset(fdt, offset, &name, NULL);
|
|
if (!strncmp(name, "ethernet", len)) {
|
|
i = trailing_strtol(name);
|
|
if (i != -1) {
|
|
if (i == 0)
|
|
strcpy(mac, "ethaddr");
|
|
else
|
|
sprintf(mac, "eth%daddr", i);
|
|
} else {
|
|
continue;
|
|
}
|
|
tmp = getenv(mac);
|
|
if (!tmp)
|
|
continue;
|
|
|
|
for (j = 0; j < 6; j++) {
|
|
mac_addr[j] = tmp ?
|
|
simple_strtoul(tmp, &end, 16) : 0;
|
|
if (tmp)
|
|
tmp = (*end) ? end + 1 : end;
|
|
}
|
|
|
|
do_fixup_by_path(fdt, path, "mac-address",
|
|
&mac_addr, 6, 0);
|
|
do_fixup_by_path(fdt, path, "local-mac-address",
|
|
&mac_addr, 6, 1);
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Resize the fdt to its actual size + a bit of padding */
|
|
int fdt_shrink_to_minimum(void *blob, uint extrasize)
|
|
{
|
|
int i;
|
|
uint64_t addr, size;
|
|
int total, ret;
|
|
uint actualsize;
|
|
|
|
if (!blob)
|
|
return 0;
|
|
|
|
total = fdt_num_mem_rsv(blob);
|
|
for (i = 0; i < total; i++) {
|
|
fdt_get_mem_rsv(blob, i, &addr, &size);
|
|
if (addr == (uintptr_t)blob) {
|
|
fdt_del_mem_rsv(blob, i);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Calculate the actual size of the fdt
|
|
* plus the size needed for 5 fdt_add_mem_rsv, one
|
|
* for the fdt itself and 4 for a possible initrd
|
|
* ((initrd-start + initrd-end) * 2 (name & value))
|
|
*/
|
|
actualsize = fdt_off_dt_strings(blob) +
|
|
fdt_size_dt_strings(blob) + 5 * sizeof(struct fdt_reserve_entry);
|
|
|
|
actualsize += extrasize;
|
|
/* Make it so the fdt ends on a page boundary */
|
|
actualsize = ALIGN(actualsize + ((uintptr_t)blob & 0xfff), 0x1000);
|
|
actualsize = actualsize - ((uintptr_t)blob & 0xfff);
|
|
|
|
/* Change the fdt header to reflect the correct size */
|
|
fdt_set_totalsize(blob, actualsize);
|
|
|
|
/* Add the new reservation */
|
|
ret = fdt_add_mem_rsv(blob, (uintptr_t)blob, actualsize);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return actualsize;
|
|
}
|
|
|
|
#ifdef CONFIG_PCI
|
|
#define CONFIG_SYS_PCI_NR_INBOUND_WIN 4
|
|
|
|
#define FDT_PCI_PREFETCH (0x40000000)
|
|
#define FDT_PCI_MEM32 (0x02000000)
|
|
#define FDT_PCI_IO (0x01000000)
|
|
#define FDT_PCI_MEM64 (0x03000000)
|
|
|
|
int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {
|
|
|
|
int addrcell, sizecell, len, r;
|
|
u32 *dma_range;
|
|
/* sized based on pci addr cells, size-cells, & address-cells */
|
|
u32 dma_ranges[(3 + 2 + 2) * CONFIG_SYS_PCI_NR_INBOUND_WIN];
|
|
|
|
addrcell = fdt_getprop_u32_default(blob, "/", "#address-cells", 1);
|
|
sizecell = fdt_getprop_u32_default(blob, "/", "#size-cells", 1);
|
|
|
|
dma_range = &dma_ranges[0];
|
|
for (r = 0; r < hose->region_count; r++) {
|
|
u64 bus_start, phys_start, size;
|
|
|
|
/* skip if !PCI_REGION_SYS_MEMORY */
|
|
if (!(hose->regions[r].flags & PCI_REGION_SYS_MEMORY))
|
|
continue;
|
|
|
|
bus_start = (u64)hose->regions[r].bus_start;
|
|
phys_start = (u64)hose->regions[r].phys_start;
|
|
size = (u64)hose->regions[r].size;
|
|
|
|
dma_range[0] = 0;
|
|
if (size >= 0x100000000ull)
|
|
dma_range[0] |= FDT_PCI_MEM64;
|
|
else
|
|
dma_range[0] |= FDT_PCI_MEM32;
|
|
if (hose->regions[r].flags & PCI_REGION_PREFETCH)
|
|
dma_range[0] |= FDT_PCI_PREFETCH;
|
|
#ifdef CONFIG_SYS_PCI_64BIT
|
|
dma_range[1] = bus_start >> 32;
|
|
#else
|
|
dma_range[1] = 0;
|
|
#endif
|
|
dma_range[2] = bus_start & 0xffffffff;
|
|
|
|
if (addrcell == 2) {
|
|
dma_range[3] = phys_start >> 32;
|
|
dma_range[4] = phys_start & 0xffffffff;
|
|
} else {
|
|
dma_range[3] = phys_start & 0xffffffff;
|
|
}
|
|
|
|
if (sizecell == 2) {
|
|
dma_range[3 + addrcell + 0] = size >> 32;
|
|
dma_range[3 + addrcell + 1] = size & 0xffffffff;
|
|
} else {
|
|
dma_range[3 + addrcell + 0] = size & 0xffffffff;
|
|
}
|
|
|
|
dma_range += (3 + addrcell + sizecell);
|
|
}
|
|
|
|
len = dma_range - &dma_ranges[0];
|
|
if (len)
|
|
fdt_setprop(blob, phb_off, "dma-ranges", &dma_ranges[0], len*4);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
|
|
/*
|
|
* Provide a weak default function to return the flash bank size.
|
|
* There might be multiple non-identical flash chips connected to one
|
|
* chip-select, so we need to pass an index as well.
|
|
*/
|
|
u32 __flash_get_bank_size(int cs, int idx)
|
|
{
|
|
extern flash_info_t flash_info[];
|
|
|
|
/*
|
|
* As default, a simple 1:1 mapping is provided. Boards with
|
|
* a different mapping need to supply a board specific mapping
|
|
* routine.
|
|
*/
|
|
return flash_info[cs].size;
|
|
}
|
|
u32 flash_get_bank_size(int cs, int idx)
|
|
__attribute__((weak, alias("__flash_get_bank_size")));
|
|
|
|
/*
|
|
* This function can be used to update the size in the "reg" property
|
|
* of all NOR FLASH device nodes. This is necessary for boards with
|
|
* non-fixed NOR FLASH sizes.
|
|
*/
|
|
int fdt_fixup_nor_flash_size(void *blob)
|
|
{
|
|
char compat[][16] = { "cfi-flash", "jedec-flash" };
|
|
int off;
|
|
int len;
|
|
struct fdt_property *prop;
|
|
u32 *reg, *reg2;
|
|
int i;
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
off = fdt_node_offset_by_compatible(blob, -1, compat[i]);
|
|
while (off != -FDT_ERR_NOTFOUND) {
|
|
int idx;
|
|
|
|
/*
|
|
* Found one compatible node, so fixup the size
|
|
* int its reg properties
|
|
*/
|
|
prop = fdt_get_property_w(blob, off, "reg", &len);
|
|
if (prop) {
|
|
int tuple_size = 3 * sizeof(reg);
|
|
|
|
/*
|
|
* There might be multiple reg-tuples,
|
|
* so loop through them all
|
|
*/
|
|
reg = reg2 = (u32 *)&prop->data[0];
|
|
for (idx = 0; idx < (len / tuple_size); idx++) {
|
|
/*
|
|
* Update size in reg property
|
|
*/
|
|
reg[2] = flash_get_bank_size(reg[0],
|
|
idx);
|
|
|
|
/*
|
|
* Point to next reg tuple
|
|
*/
|
|
reg += 3;
|
|
}
|
|
|
|
fdt_setprop(blob, off, "reg", reg2, len);
|
|
}
|
|
|
|
/* Move to next compatible node */
|
|
off = fdt_node_offset_by_compatible(blob, off,
|
|
compat[i]);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
int fdt_increase_size(void *fdt, int add_len)
|
|
{
|
|
int newlen;
|
|
|
|
newlen = fdt_totalsize(fdt) + add_len;
|
|
|
|
/* Open in place with a new len */
|
|
return fdt_open_into(fdt, fdt, newlen);
|
|
}
|
|
|
|
#ifdef CONFIG_FDT_FIXUP_PARTITIONS
|
|
#include <jffs2/load_kernel.h>
|
|
#include <mtd_node.h>
|
|
|
|
struct reg_cell {
|
|
unsigned int r0;
|
|
unsigned int r1;
|
|
};
|
|
|
|
int fdt_del_subnodes(const void *blob, int parent_offset)
|
|
{
|
|
int off, ndepth;
|
|
int ret;
|
|
|
|
for (ndepth = 0, off = fdt_next_node(blob, parent_offset, &ndepth);
|
|
(off >= 0) && (ndepth > 0);
|
|
off = fdt_next_node(blob, off, &ndepth)) {
|
|
if (ndepth == 1) {
|
|
debug("delete %s: offset: %x\n",
|
|
fdt_get_name(blob, off, 0), off);
|
|
ret = fdt_del_node((void *)blob, off);
|
|
if (ret < 0) {
|
|
printf("Can't delete node: %s\n",
|
|
fdt_strerror(ret));
|
|
return ret;
|
|
} else {
|
|
ndepth = 0;
|
|
off = parent_offset;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int fdt_del_partitions(void *blob, int parent_offset)
|
|
{
|
|
const void *prop;
|
|
int ndepth = 0;
|
|
int off;
|
|
int ret;
|
|
|
|
off = fdt_next_node(blob, parent_offset, &ndepth);
|
|
if (off > 0 && ndepth == 1) {
|
|
prop = fdt_getprop(blob, off, "label", NULL);
|
|
if (prop == NULL) {
|
|
/*
|
|
* Could not find label property, nand {}; node?
|
|
* Check subnode, delete partitions there if any.
|
|
*/
|
|
return fdt_del_partitions(blob, off);
|
|
} else {
|
|
ret = fdt_del_subnodes(blob, parent_offset);
|
|
if (ret < 0) {
|
|
printf("Can't remove subnodes: %s\n",
|
|
fdt_strerror(ret));
|
|
return ret;
|
|
}
|
|
}
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int fdt_node_set_part_info(void *blob, int parent_offset,
|
|
struct mtd_device *dev)
|
|
{
|
|
struct list_head *pentry;
|
|
struct part_info *part;
|
|
struct reg_cell cell;
|
|
int off, ndepth = 0;
|
|
int part_num, ret;
|
|
char buf[64];
|
|
|
|
ret = fdt_del_partitions(blob, parent_offset);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/*
|
|
* Check if it is nand {}; subnode, adjust
|
|
* the offset in this case
|
|
*/
|
|
off = fdt_next_node(blob, parent_offset, &ndepth);
|
|
if (off > 0 && ndepth == 1)
|
|
parent_offset = off;
|
|
|
|
part_num = 0;
|
|
list_for_each_prev(pentry, &dev->parts) {
|
|
int newoff;
|
|
|
|
part = list_entry(pentry, struct part_info, link);
|
|
|
|
debug("%2d: %-20s0x%08llx\t0x%08llx\t%d\n",
|
|
part_num, part->name, part->size,
|
|
part->offset, part->mask_flags);
|
|
|
|
sprintf(buf, "partition@%llx", part->offset);
|
|
add_sub:
|
|
ret = fdt_add_subnode(blob, parent_offset, buf);
|
|
if (ret == -FDT_ERR_NOSPACE) {
|
|
ret = fdt_increase_size(blob, 512);
|
|
if (!ret)
|
|
goto add_sub;
|
|
else
|
|
goto err_size;
|
|
} else if (ret < 0) {
|
|
printf("Can't add partition node: %s\n",
|
|
fdt_strerror(ret));
|
|
return ret;
|
|
}
|
|
newoff = ret;
|
|
|
|
/* Check MTD_WRITEABLE_CMD flag */
|
|
if (part->mask_flags & 1) {
|
|
add_ro:
|
|
ret = fdt_setprop(blob, newoff, "read_only", NULL, 0);
|
|
if (ret == -FDT_ERR_NOSPACE) {
|
|
ret = fdt_increase_size(blob, 512);
|
|
if (!ret)
|
|
goto add_ro;
|
|
else
|
|
goto err_size;
|
|
} else if (ret < 0)
|
|
goto err_prop;
|
|
}
|
|
|
|
cell.r0 = cpu_to_fdt32(part->offset);
|
|
cell.r1 = cpu_to_fdt32(part->size);
|
|
add_reg:
|
|
ret = fdt_setprop(blob, newoff, "reg", &cell, sizeof(cell));
|
|
if (ret == -FDT_ERR_NOSPACE) {
|
|
ret = fdt_increase_size(blob, 512);
|
|
if (!ret)
|
|
goto add_reg;
|
|
else
|
|
goto err_size;
|
|
} else if (ret < 0)
|
|
goto err_prop;
|
|
|
|
add_label:
|
|
ret = fdt_setprop_string(blob, newoff, "label", part->name);
|
|
if (ret == -FDT_ERR_NOSPACE) {
|
|
ret = fdt_increase_size(blob, 512);
|
|
if (!ret)
|
|
goto add_label;
|
|
else
|
|
goto err_size;
|
|
} else if (ret < 0)
|
|
goto err_prop;
|
|
|
|
part_num++;
|
|
}
|
|
return 0;
|
|
err_size:
|
|
printf("Can't increase blob size: %s\n", fdt_strerror(ret));
|
|
return ret;
|
|
err_prop:
|
|
printf("Can't add property: %s\n", fdt_strerror(ret));
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* Update partitions in nor/nand nodes using info from
|
|
* mtdparts environment variable. The nodes to update are
|
|
* specified by node_info structure which contains mtd device
|
|
* type and compatible string: E. g. the board code in
|
|
* ft_board_setup() could use:
|
|
*
|
|
* struct node_info nodes[] = {
|
|
* { "fsl,mpc5121-nfc", MTD_DEV_TYPE_NAND, },
|
|
* { "cfi-flash", MTD_DEV_TYPE_NOR, },
|
|
* };
|
|
*
|
|
* fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
|
|
*/
|
|
void fdt_fixup_mtdparts(void *blob, void *node_info, int node_info_size)
|
|
{
|
|
struct node_info *ni = node_info;
|
|
struct mtd_device *dev;
|
|
char *parts;
|
|
int i, idx;
|
|
int noff;
|
|
|
|
parts = getenv("mtdparts");
|
|
if (!parts)
|
|
return;
|
|
|
|
if (mtdparts_init() != 0)
|
|
return;
|
|
|
|
for (i = 0; i < node_info_size; i++) {
|
|
idx = 0;
|
|
noff = fdt_node_offset_by_compatible(blob, -1, ni[i].compat);
|
|
while (noff != -FDT_ERR_NOTFOUND) {
|
|
debug("%s: %s, mtd dev type %d\n",
|
|
fdt_get_name(blob, noff, 0),
|
|
ni[i].compat, ni[i].type);
|
|
dev = device_find(ni[i].type, idx++);
|
|
if (dev) {
|
|
if (fdt_node_set_part_info(blob, noff, dev))
|
|
return; /* return on error */
|
|
}
|
|
|
|
/* Jump to next flash node */
|
|
noff = fdt_node_offset_by_compatible(blob, noff,
|
|
ni[i].compat);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
void fdt_del_node_and_alias(void *blob, const char *alias)
|
|
{
|
|
int off = fdt_path_offset(blob, alias);
|
|
|
|
if (off < 0)
|
|
return;
|
|
|
|
fdt_del_node(blob, off);
|
|
|
|
off = fdt_path_offset(blob, "/aliases");
|
|
fdt_delprop(blob, off, alias);
|
|
}
|
|
|
|
/* Max address size we deal with */
|
|
#define OF_MAX_ADDR_CELLS 4
|
|
#define OF_BAD_ADDR FDT_ADDR_T_NONE
|
|
#define OF_CHECK_COUNTS(na, ns) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS && \
|
|
(ns) > 0)
|
|
|
|
/* Debug utility */
|
|
#ifdef DEBUG
|
|
static void of_dump_addr(const char *s, const fdt32_t *addr, int na)
|
|
{
|
|
printf("%s", s);
|
|
while(na--)
|
|
printf(" %08x", *(addr++));
|
|
printf("\n");
|
|
}
|
|
#else
|
|
static void of_dump_addr(const char *s, const fdt32_t *addr, int na) { }
|
|
#endif
|
|
|
|
/**
|
|
* struct of_bus - Callbacks for bus specific translators
|
|
* @name: A string used to identify this bus in debug output.
|
|
* @addresses: The name of the DT property from which addresses are
|
|
* to be read, typically "reg".
|
|
* @match: Return non-zero if the node whose parent is at
|
|
* parentoffset in the FDT blob corresponds to a bus
|
|
* of this type, otherwise return zero. If NULL a match
|
|
* is assumed.
|
|
* @count_cells:Count how many cells (be32 values) a node whose parent
|
|
* is at parentoffset in the FDT blob will require to
|
|
* represent its address (written to *addrc) & size
|
|
* (written to *sizec).
|
|
* @map: Map the address addr from the address space of this
|
|
* bus to that of its parent, making use of the ranges
|
|
* read from DT to an array at range. na and ns are the
|
|
* number of cells (be32 values) used to hold and address
|
|
* or size, respectively, for this bus. pna is the number
|
|
* of cells used to hold an address for the parent bus.
|
|
* Returns the address in the address space of the parent
|
|
* bus.
|
|
* @translate: Update the value of the address cells at addr within an
|
|
* FDT by adding offset to it. na specifies the number of
|
|
* cells used to hold the address being translated. Returns
|
|
* zero on success, non-zero on error.
|
|
*
|
|
* Each bus type will include a struct of_bus in the of_busses array,
|
|
* providing implementations of some or all of the functions used to
|
|
* match the bus & handle address translation for its children.
|
|
*/
|
|
struct of_bus {
|
|
const char *name;
|
|
const char *addresses;
|
|
int (*match)(const void *blob, int parentoffset);
|
|
void (*count_cells)(const void *blob, int parentoffset,
|
|
int *addrc, int *sizec);
|
|
u64 (*map)(fdt32_t *addr, const fdt32_t *range,
|
|
int na, int ns, int pna);
|
|
int (*translate)(fdt32_t *addr, u64 offset, int na);
|
|
};
|
|
|
|
/* Default translator (generic bus) */
|
|
void of_bus_default_count_cells(const void *blob, int parentoffset,
|
|
int *addrc, int *sizec)
|
|
{
|
|
const fdt32_t *prop;
|
|
|
|
if (addrc)
|
|
*addrc = fdt_address_cells(blob, parentoffset);
|
|
|
|
if (sizec) {
|
|
prop = fdt_getprop(blob, parentoffset, "#size-cells", NULL);
|
|
if (prop)
|
|
*sizec = be32_to_cpup(prop);
|
|
else
|
|
*sizec = 1;
|
|
}
|
|
}
|
|
|
|
static u64 of_bus_default_map(fdt32_t *addr, const fdt32_t *range,
|
|
int na, int ns, int pna)
|
|
{
|
|
u64 cp, s, da;
|
|
|
|
cp = of_read_number(range, na);
|
|
s = of_read_number(range + na + pna, ns);
|
|
da = of_read_number(addr, na);
|
|
|
|
debug("OF: default map, cp=%" PRIu64 ", s=%" PRIu64
|
|
", da=%" PRIu64 "\n", cp, s, da);
|
|
|
|
if (da < cp || da >= (cp + s))
|
|
return OF_BAD_ADDR;
|
|
return da - cp;
|
|
}
|
|
|
|
static int of_bus_default_translate(fdt32_t *addr, u64 offset, int na)
|
|
{
|
|
u64 a = of_read_number(addr, na);
|
|
memset(addr, 0, na * 4);
|
|
a += offset;
|
|
if (na > 1)
|
|
addr[na - 2] = cpu_to_fdt32(a >> 32);
|
|
addr[na - 1] = cpu_to_fdt32(a & 0xffffffffu);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_OF_ISA_BUS
|
|
|
|
/* ISA bus translator */
|
|
static int of_bus_isa_match(const void *blob, int parentoffset)
|
|
{
|
|
const char *name;
|
|
|
|
name = fdt_get_name(blob, parentoffset, NULL);
|
|
if (!name)
|
|
return 0;
|
|
|
|
return !strcmp(name, "isa");
|
|
}
|
|
|
|
static void of_bus_isa_count_cells(const void *blob, int parentoffset,
|
|
int *addrc, int *sizec)
|
|
{
|
|
if (addrc)
|
|
*addrc = 2;
|
|
if (sizec)
|
|
*sizec = 1;
|
|
}
|
|
|
|
static u64 of_bus_isa_map(fdt32_t *addr, const fdt32_t *range,
|
|
int na, int ns, int pna)
|
|
{
|
|
u64 cp, s, da;
|
|
|
|
/* Check address type match */
|
|
if ((addr[0] ^ range[0]) & cpu_to_be32(1))
|
|
return OF_BAD_ADDR;
|
|
|
|
cp = of_read_number(range + 1, na - 1);
|
|
s = of_read_number(range + na + pna, ns);
|
|
da = of_read_number(addr + 1, na - 1);
|
|
|
|
debug("OF: ISA map, cp=%" PRIu64 ", s=%" PRIu64
|
|
", da=%" PRIu64 "\n", cp, s, da);
|
|
|
|
if (da < cp || da >= (cp + s))
|
|
return OF_BAD_ADDR;
|
|
return da - cp;
|
|
}
|
|
|
|
static int of_bus_isa_translate(fdt32_t *addr, u64 offset, int na)
|
|
{
|
|
return of_bus_default_translate(addr + 1, offset, na - 1);
|
|
}
|
|
|
|
#endif /* CONFIG_OF_ISA_BUS */
|
|
|
|
/* Array of bus specific translators */
|
|
static struct of_bus of_busses[] = {
|
|
#ifdef CONFIG_OF_ISA_BUS
|
|
/* ISA */
|
|
{
|
|
.name = "isa",
|
|
.addresses = "reg",
|
|
.match = of_bus_isa_match,
|
|
.count_cells = of_bus_isa_count_cells,
|
|
.map = of_bus_isa_map,
|
|
.translate = of_bus_isa_translate,
|
|
},
|
|
#endif /* CONFIG_OF_ISA_BUS */
|
|
/* Default */
|
|
{
|
|
.name = "default",
|
|
.addresses = "reg",
|
|
.count_cells = of_bus_default_count_cells,
|
|
.map = of_bus_default_map,
|
|
.translate = of_bus_default_translate,
|
|
},
|
|
};
|
|
|
|
static struct of_bus *of_match_bus(const void *blob, int parentoffset)
|
|
{
|
|
struct of_bus *bus;
|
|
|
|
if (ARRAY_SIZE(of_busses) == 1)
|
|
return of_busses;
|
|
|
|
for (bus = of_busses; bus; bus++) {
|
|
if (!bus->match || bus->match(blob, parentoffset))
|
|
return bus;
|
|
}
|
|
|
|
/*
|
|
* We should always have matched the default bus at least, since
|
|
* it has a NULL match field. If we didn't then it somehow isn't
|
|
* in the of_busses array or something equally catastrophic has
|
|
* gone wrong.
|
|
*/
|
|
assert(0);
|
|
return NULL;
|
|
}
|
|
|
|
static int of_translate_one(const void *blob, int parent, struct of_bus *bus,
|
|
struct of_bus *pbus, fdt32_t *addr,
|
|
int na, int ns, int pna, const char *rprop)
|
|
{
|
|
const fdt32_t *ranges;
|
|
int rlen;
|
|
int rone;
|
|
u64 offset = OF_BAD_ADDR;
|
|
|
|
/* Normally, an absence of a "ranges" property means we are
|
|
* crossing a non-translatable boundary, and thus the addresses
|
|
* below the current not cannot be converted to CPU physical ones.
|
|
* Unfortunately, while this is very clear in the spec, it's not
|
|
* what Apple understood, and they do have things like /uni-n or
|
|
* /ht nodes with no "ranges" property and a lot of perfectly
|
|
* useable mapped devices below them. Thus we treat the absence of
|
|
* "ranges" as equivalent to an empty "ranges" property which means
|
|
* a 1:1 translation at that level. It's up to the caller not to try
|
|
* to translate addresses that aren't supposed to be translated in
|
|
* the first place. --BenH.
|
|
*/
|
|
ranges = fdt_getprop(blob, parent, rprop, &rlen);
|
|
if (ranges == NULL || rlen == 0) {
|
|
offset = of_read_number(addr, na);
|
|
memset(addr, 0, pna * 4);
|
|
debug("OF: no ranges, 1:1 translation\n");
|
|
goto finish;
|
|
}
|
|
|
|
debug("OF: walking ranges...\n");
|
|
|
|
/* Now walk through the ranges */
|
|
rlen /= 4;
|
|
rone = na + pna + ns;
|
|
for (; rlen >= rone; rlen -= rone, ranges += rone) {
|
|
offset = bus->map(addr, ranges, na, ns, pna);
|
|
if (offset != OF_BAD_ADDR)
|
|
break;
|
|
}
|
|
if (offset == OF_BAD_ADDR) {
|
|
debug("OF: not found !\n");
|
|
return 1;
|
|
}
|
|
memcpy(addr, ranges + na, 4 * pna);
|
|
|
|
finish:
|
|
of_dump_addr("OF: parent translation for:", addr, pna);
|
|
debug("OF: with offset: %" PRIu64 "\n", offset);
|
|
|
|
/* Translate it into parent bus space */
|
|
return pbus->translate(addr, offset, pna);
|
|
}
|
|
|
|
/*
|
|
* Translate an address from the device-tree into a CPU physical address,
|
|
* this walks up the tree and applies the various bus mappings on the
|
|
* way.
|
|
*
|
|
* Note: We consider that crossing any level with #size-cells == 0 to mean
|
|
* that translation is impossible (that is we are not dealing with a value
|
|
* that can be mapped to a cpu physical address). This is not really specified
|
|
* that way, but this is traditionally the way IBM at least do things
|
|
*/
|
|
static u64 __of_translate_address(const void *blob, int node_offset,
|
|
const fdt32_t *in_addr, const char *rprop)
|
|
{
|
|
int parent;
|
|
struct of_bus *bus, *pbus;
|
|
fdt32_t addr[OF_MAX_ADDR_CELLS];
|
|
int na, ns, pna, pns;
|
|
u64 result = OF_BAD_ADDR;
|
|
|
|
debug("OF: ** translation for device %s **\n",
|
|
fdt_get_name(blob, node_offset, NULL));
|
|
|
|
/* Get parent & match bus type */
|
|
parent = fdt_parent_offset(blob, node_offset);
|
|
if (parent < 0)
|
|
goto bail;
|
|
bus = of_match_bus(blob, parent);
|
|
|
|
/* Cound address cells & copy address locally */
|
|
bus->count_cells(blob, parent, &na, &ns);
|
|
if (!OF_CHECK_COUNTS(na, ns)) {
|
|
printf("%s: Bad cell count for %s\n", __FUNCTION__,
|
|
fdt_get_name(blob, node_offset, NULL));
|
|
goto bail;
|
|
}
|
|
memcpy(addr, in_addr, na * 4);
|
|
|
|
debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
|
|
bus->name, na, ns, fdt_get_name(blob, parent, NULL));
|
|
of_dump_addr("OF: translating address:", addr, na);
|
|
|
|
/* Translate */
|
|
for (;;) {
|
|
/* Switch to parent bus */
|
|
node_offset = parent;
|
|
parent = fdt_parent_offset(blob, node_offset);
|
|
|
|
/* If root, we have finished */
|
|
if (parent < 0) {
|
|
debug("OF: reached root node\n");
|
|
result = of_read_number(addr, na);
|
|
break;
|
|
}
|
|
|
|
/* Get new parent bus and counts */
|
|
pbus = of_match_bus(blob, parent);
|
|
pbus->count_cells(blob, parent, &pna, &pns);
|
|
if (!OF_CHECK_COUNTS(pna, pns)) {
|
|
printf("%s: Bad cell count for %s\n", __FUNCTION__,
|
|
fdt_get_name(blob, node_offset, NULL));
|
|
break;
|
|
}
|
|
|
|
debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
|
|
pbus->name, pna, pns, fdt_get_name(blob, parent, NULL));
|
|
|
|
/* Apply bus translation */
|
|
if (of_translate_one(blob, node_offset, bus, pbus,
|
|
addr, na, ns, pna, rprop))
|
|
break;
|
|
|
|
/* Complete the move up one level */
|
|
na = pna;
|
|
ns = pns;
|
|
bus = pbus;
|
|
|
|
of_dump_addr("OF: one level translation:", addr, na);
|
|
}
|
|
bail:
|
|
|
|
return result;
|
|
}
|
|
|
|
u64 fdt_translate_address(const void *blob, int node_offset,
|
|
const fdt32_t *in_addr)
|
|
{
|
|
return __of_translate_address(blob, node_offset, in_addr, "ranges");
|
|
}
|
|
|
|
/**
|
|
* fdt_node_offset_by_compat_reg: Find a node that matches compatiable and
|
|
* who's reg property matches a physical cpu address
|
|
*
|
|
* @blob: ptr to device tree
|
|
* @compat: compatiable string to match
|
|
* @compat_off: property name
|
|
*
|
|
*/
|
|
int fdt_node_offset_by_compat_reg(void *blob, const char *compat,
|
|
phys_addr_t compat_off)
|
|
{
|
|
int len, off = fdt_node_offset_by_compatible(blob, -1, compat);
|
|
while (off != -FDT_ERR_NOTFOUND) {
|
|
const fdt32_t *reg = fdt_getprop(blob, off, "reg", &len);
|
|
if (reg) {
|
|
if (compat_off == fdt_translate_address(blob, off, reg))
|
|
return off;
|
|
}
|
|
off = fdt_node_offset_by_compatible(blob, off, compat);
|
|
}
|
|
|
|
return -FDT_ERR_NOTFOUND;
|
|
}
|
|
|
|
/**
|
|
* fdt_alloc_phandle: Return next free phandle value
|
|
*
|
|
* @blob: ptr to device tree
|
|
*/
|
|
int fdt_alloc_phandle(void *blob)
|
|
{
|
|
int offset;
|
|
uint32_t phandle = 0;
|
|
|
|
for (offset = fdt_next_node(blob, -1, NULL); offset >= 0;
|
|
offset = fdt_next_node(blob, offset, NULL)) {
|
|
phandle = max(phandle, fdt_get_phandle(blob, offset));
|
|
}
|
|
|
|
return phandle + 1;
|
|
}
|
|
|
|
/*
|
|
* fdt_set_phandle: Create a phandle property for the given node
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @nodeoffset: node to update
|
|
* @phandle: phandle value to set (must be unique)
|
|
*/
|
|
int fdt_set_phandle(void *fdt, int nodeoffset, uint32_t phandle)
|
|
{
|
|
int ret;
|
|
|
|
#ifdef DEBUG
|
|
int off = fdt_node_offset_by_phandle(fdt, phandle);
|
|
|
|
if ((off >= 0) && (off != nodeoffset)) {
|
|
char buf[64];
|
|
|
|
fdt_get_path(fdt, nodeoffset, buf, sizeof(buf));
|
|
printf("Trying to update node %s with phandle %u ",
|
|
buf, phandle);
|
|
|
|
fdt_get_path(fdt, off, buf, sizeof(buf));
|
|
printf("that already exists in node %s.\n", buf);
|
|
return -FDT_ERR_BADPHANDLE;
|
|
}
|
|
#endif
|
|
|
|
ret = fdt_setprop_cell(fdt, nodeoffset, "phandle", phandle);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
/*
|
|
* For now, also set the deprecated "linux,phandle" property, so that we
|
|
* don't break older kernels.
|
|
*/
|
|
ret = fdt_setprop_cell(fdt, nodeoffset, "linux,phandle", phandle);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* fdt_create_phandle: Create a phandle property for the given node
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @nodeoffset: node to update
|
|
*/
|
|
unsigned int fdt_create_phandle(void *fdt, int nodeoffset)
|
|
{
|
|
/* see if there is a phandle already */
|
|
int phandle = fdt_get_phandle(fdt, nodeoffset);
|
|
|
|
/* if we got 0, means no phandle so create one */
|
|
if (phandle == 0) {
|
|
int ret;
|
|
|
|
phandle = fdt_alloc_phandle(fdt);
|
|
ret = fdt_set_phandle(fdt, nodeoffset, phandle);
|
|
if (ret < 0) {
|
|
printf("Can't set phandle %u: %s\n", phandle,
|
|
fdt_strerror(ret));
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return phandle;
|
|
}
|
|
|
|
/*
|
|
* fdt_set_node_status: Set status for the given node
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @nodeoffset: node to update
|
|
* @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED,
|
|
* FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE
|
|
* @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE
|
|
*/
|
|
int fdt_set_node_status(void *fdt, int nodeoffset,
|
|
enum fdt_status status, unsigned int error_code)
|
|
{
|
|
char buf[16];
|
|
int ret = 0;
|
|
|
|
if (nodeoffset < 0)
|
|
return nodeoffset;
|
|
|
|
switch (status) {
|
|
case FDT_STATUS_OKAY:
|
|
ret = fdt_setprop_string(fdt, nodeoffset, "status", "okay");
|
|
break;
|
|
case FDT_STATUS_DISABLED:
|
|
ret = fdt_setprop_string(fdt, nodeoffset, "status", "disabled");
|
|
break;
|
|
case FDT_STATUS_FAIL:
|
|
ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail");
|
|
break;
|
|
case FDT_STATUS_FAIL_ERROR_CODE:
|
|
sprintf(buf, "fail-%d", error_code);
|
|
ret = fdt_setprop_string(fdt, nodeoffset, "status", buf);
|
|
break;
|
|
default:
|
|
printf("Invalid fdt status: %x\n", status);
|
|
ret = -1;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
/*
|
|
* fdt_set_status_by_alias: Set status for the given node given an alias
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @alias: alias of node to update
|
|
* @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED,
|
|
* FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE
|
|
* @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE
|
|
*/
|
|
int fdt_set_status_by_alias(void *fdt, const char* alias,
|
|
enum fdt_status status, unsigned int error_code)
|
|
{
|
|
int offset = fdt_path_offset(fdt, alias);
|
|
|
|
return fdt_set_node_status(fdt, offset, status, error_code);
|
|
}
|
|
|
|
#if defined(CONFIG_VIDEO) || defined(CONFIG_LCD)
|
|
int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf)
|
|
{
|
|
int noff;
|
|
int ret;
|
|
|
|
noff = fdt_node_offset_by_compatible(blob, -1, compat);
|
|
if (noff != -FDT_ERR_NOTFOUND) {
|
|
debug("%s: %s\n", fdt_get_name(blob, noff, 0), compat);
|
|
add_edid:
|
|
ret = fdt_setprop(blob, noff, "edid", edid_buf, 128);
|
|
if (ret == -FDT_ERR_NOSPACE) {
|
|
ret = fdt_increase_size(blob, 512);
|
|
if (!ret)
|
|
goto add_edid;
|
|
else
|
|
goto err_size;
|
|
} else if (ret < 0) {
|
|
printf("Can't add property: %s\n", fdt_strerror(ret));
|
|
return ret;
|
|
}
|
|
}
|
|
return 0;
|
|
err_size:
|
|
printf("Can't increase blob size: %s\n", fdt_strerror(ret));
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Verify the physical address of device tree node for a given alias
|
|
*
|
|
* This function locates the device tree node of a given alias, and then
|
|
* verifies that the physical address of that device matches the given
|
|
* parameter. It displays a message if there is a mismatch.
|
|
*
|
|
* Returns 1 on success, 0 on failure
|
|
*/
|
|
int fdt_verify_alias_address(void *fdt, int anode, const char *alias, u64 addr)
|
|
{
|
|
const char *path;
|
|
const fdt32_t *reg;
|
|
int node, len;
|
|
u64 dt_addr;
|
|
|
|
path = fdt_getprop(fdt, anode, alias, NULL);
|
|
if (!path) {
|
|
/* If there's no such alias, then it's not a failure */
|
|
return 1;
|
|
}
|
|
|
|
node = fdt_path_offset(fdt, path);
|
|
if (node < 0) {
|
|
printf("Warning: device tree alias '%s' points to invalid "
|
|
"node %s.\n", alias, path);
|
|
return 0;
|
|
}
|
|
|
|
reg = fdt_getprop(fdt, node, "reg", &len);
|
|
if (!reg) {
|
|
printf("Warning: device tree node '%s' has no address.\n",
|
|
path);
|
|
return 0;
|
|
}
|
|
|
|
dt_addr = fdt_translate_address(fdt, node, reg);
|
|
if (addr != dt_addr) {
|
|
printf("Warning: U-Boot configured device %s at address %"
|
|
PRIx64 ",\n but the device tree has it address %"
|
|
PRIx64 ".\n", alias, addr, dt_addr);
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* Returns the base address of an SOC or PCI node
|
|
*/
|
|
u64 fdt_get_base_address(void *fdt, int node)
|
|
{
|
|
int size;
|
|
u32 naddr;
|
|
const fdt32_t *prop;
|
|
|
|
naddr = fdt_address_cells(fdt, node);
|
|
|
|
prop = fdt_getprop(fdt, node, "ranges", &size);
|
|
|
|
return prop ? fdt_translate_address(fdt, node, prop + naddr) : 0;
|
|
}
|
|
|
|
/*
|
|
* Read a property of size <prop_len>. Currently only supports 1 or 2 cells.
|
|
*/
|
|
static int fdt_read_prop(const fdt32_t *prop, int prop_len, int cell_off,
|
|
uint64_t *val, int cells)
|
|
{
|
|
const fdt32_t *prop32 = &prop[cell_off];
|
|
const fdt64_t *prop64 = (const fdt64_t *)&prop[cell_off];
|
|
|
|
if ((cell_off + cells) > prop_len)
|
|
return -FDT_ERR_NOSPACE;
|
|
|
|
switch (cells) {
|
|
case 1:
|
|
*val = fdt32_to_cpu(*prop32);
|
|
break;
|
|
case 2:
|
|
*val = fdt64_to_cpu(*prop64);
|
|
break;
|
|
default:
|
|
return -FDT_ERR_NOSPACE;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* fdt_read_range - Read a node's n'th range property
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @node: offset of node
|
|
* @n: range index
|
|
* @child_addr: pointer to storage for the "child address" field
|
|
* @addr: pointer to storage for the CPU view translated physical start
|
|
* @len: pointer to storage for the range length
|
|
*
|
|
* Convenience function that reads and interprets a specific range out of
|
|
* a number of the "ranges" property array.
|
|
*/
|
|
int fdt_read_range(void *fdt, int node, int n, uint64_t *child_addr,
|
|
uint64_t *addr, uint64_t *len)
|
|
{
|
|
int pnode = fdt_parent_offset(fdt, node);
|
|
const fdt32_t *ranges;
|
|
int pacells;
|
|
int acells;
|
|
int scells;
|
|
int ranges_len;
|
|
int cell = 0;
|
|
int r = 0;
|
|
|
|
/*
|
|
* The "ranges" property is an array of
|
|
* { <child address> <parent address> <size in child address space> }
|
|
*
|
|
* All 3 elements can span a diffent number of cells. Fetch their size.
|
|
*/
|
|
pacells = fdt_getprop_u32_default_node(fdt, pnode, 0, "#address-cells", 1);
|
|
acells = fdt_getprop_u32_default_node(fdt, node, 0, "#address-cells", 1);
|
|
scells = fdt_getprop_u32_default_node(fdt, node, 0, "#size-cells", 1);
|
|
|
|
/* Now try to get the ranges property */
|
|
ranges = fdt_getprop(fdt, node, "ranges", &ranges_len);
|
|
if (!ranges)
|
|
return -FDT_ERR_NOTFOUND;
|
|
ranges_len /= sizeof(uint32_t);
|
|
|
|
/* Jump to the n'th entry */
|
|
cell = n * (pacells + acells + scells);
|
|
|
|
/* Read <child address> */
|
|
if (child_addr) {
|
|
r = fdt_read_prop(ranges, ranges_len, cell, child_addr,
|
|
acells);
|
|
if (r)
|
|
return r;
|
|
}
|
|
cell += acells;
|
|
|
|
/* Read <parent address> */
|
|
if (addr)
|
|
*addr = fdt_translate_address(fdt, node, ranges + cell);
|
|
cell += pacells;
|
|
|
|
/* Read <size in child address space> */
|
|
if (len) {
|
|
r = fdt_read_prop(ranges, ranges_len, cell, len, scells);
|
|
if (r)
|
|
return r;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* fdt_setup_simplefb_node - Fill and enable a simplefb node
|
|
*
|
|
* @fdt: ptr to device tree
|
|
* @node: offset of the simplefb node
|
|
* @base_address: framebuffer base address
|
|
* @width: width in pixels
|
|
* @height: height in pixels
|
|
* @stride: bytes per line
|
|
* @format: pixel format string
|
|
*
|
|
* Convenience function to fill and enable a simplefb node.
|
|
*/
|
|
int fdt_setup_simplefb_node(void *fdt, int node, u64 base_address, u32 width,
|
|
u32 height, u32 stride, const char *format)
|
|
{
|
|
char name[32];
|
|
fdt32_t cells[4];
|
|
int i, addrc, sizec, ret;
|
|
|
|
of_bus_default_count_cells(fdt, fdt_parent_offset(fdt, node),
|
|
&addrc, &sizec);
|
|
i = 0;
|
|
if (addrc == 2)
|
|
cells[i++] = cpu_to_fdt32(base_address >> 32);
|
|
cells[i++] = cpu_to_fdt32(base_address);
|
|
if (sizec == 2)
|
|
cells[i++] = 0;
|
|
cells[i++] = cpu_to_fdt32(height * stride);
|
|
|
|
ret = fdt_setprop(fdt, node, "reg", cells, sizeof(cells[0]) * i);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
snprintf(name, sizeof(name), "framebuffer@%" PRIx64, base_address);
|
|
ret = fdt_set_name(fdt, node, name);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = fdt_setprop_u32(fdt, node, "width", width);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = fdt_setprop_u32(fdt, node, "height", height);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = fdt_setprop_u32(fdt, node, "stride", stride);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = fdt_setprop_string(fdt, node, "format", format);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = fdt_setprop_string(fdt, node, "status", "okay");
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Update native-mode in display-timings from display environment variable.
|
|
* The node to update are specified by path.
|
|
*/
|
|
int fdt_fixup_display(void *blob, const char *path, const char *display)
|
|
{
|
|
int off, toff;
|
|
|
|
if (!display || !path)
|
|
return -FDT_ERR_NOTFOUND;
|
|
|
|
toff = fdt_path_offset(blob, path);
|
|
if (toff >= 0)
|
|
toff = fdt_subnode_offset(blob, toff, "display-timings");
|
|
if (toff < 0)
|
|
return toff;
|
|
|
|
for (off = fdt_first_subnode(blob, toff);
|
|
off >= 0;
|
|
off = fdt_next_subnode(blob, off)) {
|
|
uint32_t h = fdt_get_phandle(blob, off);
|
|
debug("%s:0x%x\n", fdt_get_name(blob, off, NULL),
|
|
fdt32_to_cpu(h));
|
|
if (strcasecmp(fdt_get_name(blob, off, NULL), display) == 0)
|
|
return fdt_setprop_u32(blob, toff, "native-mode", h);
|
|
}
|
|
return toff;
|
|
}
|