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u-boot/drivers/clk
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Marek Vasut f9f016adcd clk: socfpga: Add initial Arria10 clock driver 
Add clock driver for the Arria10, which allows reading the clock
frequency from all the clock described in the DT. The driver also
allows enabling and disabling the clock. Reconfiguring frequency
is not supported thus far.

Since the DT bindings for the SoCFPGA clock are massively misdesigned
and the handoff DT adds additional incorrectly described entries to
the DT, the driver contains workarounds which attempt to rectify all
of those problems.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
2018-08-13 22:35:42 +02:00
..
altera clk: socfpga: Add initial Arria10 clock driver 2018-08-13 22:35:42 +02:00
aspeed SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
at91 clk: at91: clk-h32mx: replace dm_warn with dev_dbg 2018-05-23 17:30:03 -04:00
exynos SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
mvebu clk: armada-37xx: Support soc_clk_dump 2018-05-14 10:00:15 +02:00
owl clk: Add Actions Semi OWL clock support 2018-07-09 15:25:31 -04:00
renesas clk: rmobile: Add R8A77995 RPC clock 2018-06-14 13:36:33 +02:00
rockchip rockchip: clk: rk3288: handle clk_enable requests for GMAC 2018-05-14 17:30:40 +02:00
tegra SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
uniphier SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk-hsdk-cgu.c Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR 2018-04-27 14:54:48 -04:00
clk-uclass.c clk: clk_set_default: accept no-op skip fields 2018-08-04 14:50:10 -04:00
clk_bcm6345.c clk: bcm6345: convert to use live dt 2018-06-01 15:56:02 +02:00
clk_boston.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_fixed_rate.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_meson.c clk: add Amlogic meson clock driver 2018-06-19 07:31:47 -04:00
clk_meson.h clk: add Amlogic meson clock driver 2018-06-19 07:31:47 -04:00
clk_pic32.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_sandbox.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_sandbox_test.c clk: add clk_valid() 2018-08-03 19:53:10 -04:00
clk_stm32f.c clk: clk_stm32f: Use PLLSAIP as USB 48MHz clock 2018-05-08 09:07:34 -04:00
clk_stm32h7.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_stm32mp1.c stm32mp1: clk: support digital bypass 2018-07-20 15:55:07 -04:00
clk_zynq.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
clk_zynqmp.c clk: zynqmp: Fixed the same if/else part error reported by coverity 2018-07-19 10:49:53 +02:00
ics8n3qv01.c clk: Add ICS8N3QV01 driver 2018-05-08 18:50:23 -04:00
Kconfig clk: Add Actions Semi OWL clock support 2018-07-09 15:25:31 -04:00
Makefile clk: socfpga: Add initial Arria10 clock driver 2018-08-13 22:35:42 +02:00