mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 14:53:06 +00:00
83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
49 lines
1.2 KiB
C
49 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
|
|
*/
|
|
|
|
#ifndef _RESET_MANAGER_GEN5_H_
|
|
#define _RESET_MANAGER_GEN5_H_
|
|
|
|
#include <dt-bindings/reset/altr,rst-mgr.h>
|
|
|
|
void reset_deassert_peripherals_handoff(void);
|
|
void socfpga_bridges_reset(int enable);
|
|
|
|
struct socfpga_reset_manager {
|
|
u32 status;
|
|
u32 ctrl;
|
|
u32 counts;
|
|
u32 padding1;
|
|
u32 mpu_mod_reset;
|
|
u32 per_mod_reset;
|
|
u32 per2_mod_reset;
|
|
u32 brg_mod_reset;
|
|
u32 misc_mod_reset;
|
|
u32 padding2[12];
|
|
u32 tstscratch;
|
|
};
|
|
|
|
/*
|
|
* SocFPGA Cyclone V/Arria V reset IDs, bank mapping is as follows:
|
|
* 0 ... mpumodrst
|
|
* 1 ... permodrst
|
|
* 2 ... per2modrst
|
|
* 3 ... brgmodrst
|
|
* 4 ... miscmodrst
|
|
*/
|
|
#define RSTMGR_EMAC0 RSTMGR_DEFINE(1, 0)
|
|
#define RSTMGR_EMAC1 RSTMGR_DEFINE(1, 1)
|
|
#define RSTMGR_NAND RSTMGR_DEFINE(1, 4)
|
|
#define RSTMGR_QSPI RSTMGR_DEFINE(1, 5)
|
|
#define RSTMGR_L4WD0 RSTMGR_DEFINE(1, 6)
|
|
#define RSTMGR_OSC1TIMER0 RSTMGR_DEFINE(1, 8)
|
|
#define RSTMGR_UART0 RSTMGR_DEFINE(1, 16)
|
|
#define RSTMGR_SPIM0 RSTMGR_DEFINE(1, 18)
|
|
#define RSTMGR_SPIM1 RSTMGR_DEFINE(1, 19)
|
|
#define RSTMGR_SDMMC RSTMGR_DEFINE(1, 22)
|
|
#define RSTMGR_DMA RSTMGR_DEFINE(1, 28)
|
|
#define RSTMGR_SDR RSTMGR_DEFINE(1, 29)
|
|
|
|
#endif /* _RESET_MANAGER_GEN5_H_ */
|