Kumar Gala c39f44dc6f powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board ... Move fsl_ddr_get_spd into common mpc8xxx/ddr/main.c as most boards pretty much do the same thing. The only variations are in how many controllers or DIMMs per controller exist. To make this work we standardize on the names of the SPD_EEPROM_ADDRESS defines based on the use case of the board. We allow boards to override get_spd to either do board specific fixups to the SPD data or deal with any unique behavior of how the SPD eeproms are wired up. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>		2011-04-04 09:24:41 -05:00
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common_timing_params.h	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
ctrl_regs.c	powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()	2011-04-04 09:24:40 -05:00
ddr.h	powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()	2011-04-04 09:24:40 -05:00
ddr1_dimm_params.c	Move arch/ppc to arch/powerpc	2010-04-21 23:42:38 +02:00
ddr2_dimm_params.c	Enabled support for Rev 1.3 SPD for DDR2 DIMMs	2010-05-12 04:54:30 -05:00
ddr3_dimm_params.c	powerpc/8xxx: Enable DDR3 RDIMM support	2010-07-26 13:16:10 -05:00
lc_common_dimm_params.c	powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity	2011-03-24 09:20:49 -05:00
main.c	powerpc/8xxx: Refactor fsl_ddr_get_spd into common code from board	2011-04-04 09:24:41 -05:00
Makefile	Switch from archive libraries to partial linking	2010-11-17 21:02:18 +01:00
options.c	mpc85xx: Enable unique mode registers and dynamic ODT for DDR3	2011-01-19 22:58:23 -06:00
util.c	powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq()	2011-04-04 09:24:40 -05:00