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Corstone1000 is a platform from arm, which includes pre verified Corstone SSE710 sub-system that combines Cortex-A and Cortex-M processors [0]. This code adds the support for the Cortex-A35 implementation at host side, it contains also the necessary bits to support the Corstone 1000 FVP (Fixed Virtual Platform) [1] and also the FPGA MPS3 board implementation of this platform. [2] 0: https://developer.arm.com/documentation/102360/0000 1: https://developer.arm.com/tools-and-software/open-source-software/arm-platforms-software/arm-ecosystem-fvps 2: https://developer.arm.com/documentation/dai0550/c/ Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
32 lines
711 B
Text
32 lines
711 B
Text
// SPDX-License-Identifier: GPL-2.0 or MIT
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/*
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* Copyright (c) 2022, Arm Limited. All rights reserved.
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* Copyright (c) 2022, Linaro Limited. All rights reserved.
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*
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*/
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/dts-v1/;
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#include "corstone1000.dtsi"
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/ {
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model = "ARM Corstone1000 FPGA MPS3 board";
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compatible = "arm,corstone1000-mps3";
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smsc: ethernet@4010000 {
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compatible = "smsc,lan9220", "smsc,lan9115";
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reg = <0x40100000 0x10000>;
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phy-mode = "mii";
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interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
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reg-io-width = <2>;
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smsc,irq-push-pull;
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};
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usb_host: usb@40200000 {
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compatible = "nxp,usb-isp1763";
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reg = <0x40200000 0x100000>;
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interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
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bus-width = <16>;
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dr_mode = "host";
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};
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};
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