u-boot/arch/arm/dts/armv7-m.dtsi
Patrice Chotard 63185b0a32 ARM: dts: sync armv7-m.dtsi with kernel v5.10-rc1
Since kernel v4.8-rc1, commit 05b23ebc2bd9 ("ARM: dts: armv7-m: remove skeleton.dtsi include"),
skeleton.dtsi file is no more included.

This synchronization is needed to avoid to get 2 memory node
in DTB file if, in DTS file, memory node is declared with the correct
syntax as following:

	memory@90000000 {
 		device_type = "memory";
 		reg = <0x90000000 0x800000>;
 	};

Then in DTB, we will have the 2 memory nodes, which is incorrect and
cause misbehavior during DT parsing by U-boot:

	memory {
		device_type = "memory";
		reg = <0x00 0x00>;
	};

	memory@90000000 {
		device_type = "memory";
		reg = <0x90000000 0x800000>;
	};

Issue found when synchronizing MCU's STM32 DT from kernel v5.10-rc1.
When using fdtdec_setup_mem_size_base() or fdtdec_setup_memory_banksize()
API, first above memory node is found (with reg = <0x00 0x00>), so
gd->ram_size, gd->ram_base, gd->bd->bi_dram[bank].start and
gd->bd->bi_dram[bank].size are all set to 0 which avoid boards to boot.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-11-25 10:29:23 +01:00

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// SPDX-License-Identifier: GPL-2.0
/ {
nvic: interrupt-controller@e000e100 {
compatible = "arm,armv7m-nvic";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xe000e100 0xc00>;
};
systick: timer@e000e010 {
compatible = "arm,armv7m-systick";
reg = <0xe000e010 0x10>;
status = "disabled";
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&nvic>;
ranges;
};
};