mirror of
https://github.com/AsahiLinux/u-boot
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401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
124 lines
2.7 KiB
C
124 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* (C) Copyright 2009
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*/
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#include <common.h>
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#include <init.h>
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#include <time.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_gpt.h>
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#include <asm/arch/spr_misc.h>
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#include <asm/ptrace.h>
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#include <linux/delay.h>
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#define GPT_RESOLUTION (CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
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#define READ_TIMER() (readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
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static struct gpt_regs *const gpt_regs_p =
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(struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
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static struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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DECLARE_GLOBAL_DATA_PTR;
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static ulong get_timer_masked(void);
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#define timestamp gd->arch.tbl
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#define lastdec gd->arch.lastinc
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int timer_init(void)
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{
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u32 synth;
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/* Prescaler setting */
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#if defined(CONFIG_SPEAR3XX)
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writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
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synth = MISC_GPT4SYNTH;
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#elif defined(CONFIG_SPEAR600)
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writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
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synth = MISC_GPT3SYNTH;
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#else
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# error Incorrect config. Can only be SPEAR{600|300|310|320}
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#endif
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writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
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&misc_regs_p->periph_clk_cfg);
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/* disable timers */
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writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
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/* load value for free running */
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writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
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/* auto reload, start timer */
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writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
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/* Reset the timer */
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lastdec = READ_TIMER();
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timestamp = 0;
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return 0;
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}
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/*
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* timer without interrupts
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*/
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ulong get_timer(ulong base)
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{
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return (get_timer_masked() / GPT_RESOLUTION) - base;
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}
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void __udelay(unsigned long usec)
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{
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ulong tmo;
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ulong start = get_timer_masked();
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ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
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ulong rndoff;
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rndoff = (usec % 10) ? 1 : 0;
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/* tenudelcnt timer tick gives 10 microsecconds delay */
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tmo = ((usec / 10) + rndoff) * tenudelcnt;
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while ((ulong) (get_timer_masked() - start) < tmo)
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;
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}
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static ulong get_timer_masked(void)
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{
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ulong now = READ_TIMER();
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if (now >= lastdec) {
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/* normal mode */
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timestamp += now - lastdec;
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} else {
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/* we have an overflow ... */
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timestamp += now + GPT_FREE_RUNNING - lastdec;
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}
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lastdec = now;
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return timestamp;
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return CONFIG_SPEAR_HZ;
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}
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