mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-28 15:41:40 +00:00
b51cf8bb09
Xunlong Orange Pi 5 Plus is a single-board computer based on the Rockchip RK3588 SoC. The board provides abundant interfaces, including two HDMI output ports, one HDMI input port, two 2.5G Ethernet ports, M.2 M-Key slot, M.2 E-Key slot, two USB 3.0, two USB 2.0, and two Type-C. Features tested on a Orange Pi 5 Plus 4GB v1.2: - SD-card boot - eMMC boot - SPI Flash boot - PCIe/NVMe - USB 2.0 host - Ethernet Device tree is imported from linux v6.7-rockchip-dts64-1 tag. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
105 lines
2.7 KiB
Text
105 lines
2.7 KiB
Text
CONFIG_ARM=y
|
|
CONFIG_SKIP_LOWLEVEL_INIT=y
|
|
CONFIG_SYS_HAS_NONCACHED_MEMORY=y
|
|
CONFIG_COUNTER_FREQUENCY=24000000
|
|
CONFIG_ARCH_ROCKCHIP=y
|
|
CONFIG_TEXT_BASE=0x00a00000
|
|
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
|
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|
CONFIG_NR_DRAM_BANKS=2
|
|
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
|
|
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000
|
|
CONFIG_SF_DEFAULT_SPEED=24000000
|
|
CONFIG_SF_DEFAULT_MODE=0x2000
|
|
CONFIG_DEFAULT_DEVICE_TREE="rk3588-orangepi-5-plus"
|
|
CONFIG_ROCKCHIP_RK3588=y
|
|
CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
|
|
CONFIG_SPL_SERIAL=y
|
|
CONFIG_SPL_STACK_R_ADDR=0x600000
|
|
CONFIG_TARGET_EVB_RK3588=y
|
|
CONFIG_SPL_STACK=0x400000
|
|
CONFIG_DEBUG_UART_BASE=0xFEB50000
|
|
CONFIG_DEBUG_UART_CLOCK=24000000
|
|
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
|
CONFIG_SPL_SPI=y
|
|
CONFIG_SYS_LOAD_ADDR=0xc00800
|
|
CONFIG_PCI=y
|
|
CONFIG_DEBUG_UART=y
|
|
CONFIG_AHCI=y
|
|
CONFIG_FIT=y
|
|
CONFIG_FIT_VERBOSE=y
|
|
CONFIG_SPL_FIT_SIGNATURE=y
|
|
CONFIG_SPL_LOAD_FIT=y
|
|
CONFIG_LEGACY_IMAGE_FORMAT=y
|
|
CONFIG_OF_BOARD_SETUP=y
|
|
CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-orangepi-5-plus.dtb"
|
|
# CONFIG_DISPLAY_CPUINFO is not set
|
|
CONFIG_DISPLAY_BOARDINFO_LATE=y
|
|
CONFIG_SPL_MAX_SIZE=0x40000
|
|
CONFIG_SPL_PAD_TO=0x7f8000
|
|
CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
|
|
CONFIG_SPL_BSS_START_ADDR=0x4000000
|
|
CONFIG_SPL_BSS_MAX_SIZE=0x4000
|
|
# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
|
# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
|
|
CONFIG_SPL_STACK_R=y
|
|
CONFIG_SPL_SPI_LOAD=y
|
|
CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
|
|
CONFIG_SPL_ATF=y
|
|
CONFIG_CMD_GPIO=y
|
|
CONFIG_CMD_GPT=y
|
|
CONFIG_CMD_I2C=y
|
|
CONFIG_CMD_MMC=y
|
|
CONFIG_CMD_PCI=y
|
|
CONFIG_CMD_USB=y
|
|
# CONFIG_CMD_SETEXPR is not set
|
|
CONFIG_CMD_REGULATOR=y
|
|
# CONFIG_SPL_DOS_PARTITION is not set
|
|
CONFIG_SPL_OF_CONTROL=y
|
|
CONFIG_OF_LIVE=y
|
|
CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
|
CONFIG_SPL_DM_SEQ_ALIAS=y
|
|
CONFIG_SPL_REGMAP=y
|
|
CONFIG_SPL_SYSCON=y
|
|
CONFIG_AHCI_PCI=y
|
|
CONFIG_DWC_AHCI=y
|
|
CONFIG_SPL_CLK=y
|
|
CONFIG_ROCKCHIP_GPIO=y
|
|
CONFIG_SYS_I2C_ROCKCHIP=y
|
|
CONFIG_MISC=y
|
|
CONFIG_SUPPORT_EMMC_RPMB=y
|
|
CONFIG_MMC_DW=y
|
|
CONFIG_MMC_DW_ROCKCHIP=y
|
|
CONFIG_MMC_SDHCI=y
|
|
CONFIG_MMC_SDHCI_SDMA=y
|
|
CONFIG_MMC_SDHCI_ROCKCHIP=y
|
|
CONFIG_SF_DEFAULT_BUS=5
|
|
CONFIG_SPI_FLASH_SFDP_SUPPORT=y
|
|
CONFIG_SPI_FLASH_XMC=y
|
|
CONFIG_PHYLIB=y
|
|
CONFIG_RTL8169=y
|
|
CONFIG_NVME_PCI=y
|
|
CONFIG_PCIE_DW_ROCKCHIP=y
|
|
CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
|
CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
|
CONFIG_PHY_ROCKCHIP_USBDP=y
|
|
CONFIG_SPL_PINCTRL=y
|
|
CONFIG_PWM_ROCKCHIP=y
|
|
CONFIG_SPL_RAM=y
|
|
CONFIG_SCSI=y
|
|
CONFIG_DM_SCSI=y
|
|
CONFIG_BAUDRATE=1500000
|
|
CONFIG_DEBUG_UART_SHIFT=2
|
|
CONFIG_SYS_NS16550_MEM32=y
|
|
CONFIG_ROCKCHIP_SFC=y
|
|
CONFIG_SYSRESET=y
|
|
CONFIG_USB=y
|
|
CONFIG_DM_USB_GADGET=y
|
|
CONFIG_USB_XHCI_HCD=y
|
|
CONFIG_USB_EHCI_HCD=y
|
|
CONFIG_USB_EHCI_GENERIC=y
|
|
CONFIG_USB_OHCI_HCD=y
|
|
CONFIG_USB_OHCI_GENERIC=y
|
|
CONFIG_USB_DWC3=y
|
|
CONFIG_USB_DWC3_GENERIC=y
|
|
CONFIG_ERRNO_STR=y
|