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https://github.com/AsahiLinux/u-boot
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f51cdaf191
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code dedicated to defining and manipulating the LBC registers. Merge this into a single spot. To do this, we have to decide on a common name for the data structure that holds the lbc registers - it will now be known as fsl_lbc_t, and we adopt a common name for the immap layouts that include the lbc - this was previously known as either im_lbc or lbus; use the former. In addition, create accessors for the BR/OR regs that use in/out_be32 and use those instead of the mismash of access methods currently in play. I have done a successful ppc build all and tested a board or two from each processor family. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
123 lines
3.3 KiB
C
123 lines
3.3 KiB
C
/*
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* Copyright 2008 Extreme Engineering Solutions, Inc.
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* Copyright 2004, 2007 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <pci.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_pci.h>
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#include <asm/io.h>
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#include <asm/cache.h>
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#include <asm/mmu.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <pca953x.h>
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extern void ft_board_pci_setup(void *blob, bd_t *bd);
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int checkboard(void)
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{
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volatile fsl_lbc_t *lbc = LBC_BASE_ADDR;
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volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
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char *s;
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printf("Board: X-ES %s PMC\n", CONFIG_SYS_BOARD_NAME);
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printf(" ");
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s = getenv("board_rev");
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if (s)
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printf("Rev %s, ", s);
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s = getenv("serial#");
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if (s)
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printf("Serial# %s, ", s);
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s = getenv("board_cfg");
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if (s)
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printf("Cfg %s", s);
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printf("\n");
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out_be32(&lbc->ltesr, 0xffffffff); /* Clear LBC error IRQs */
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out_be32(&lbc->lteir, 0xffffffff); /* Enable LBC error IRQs */
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out_be32(&ecm->eedr, 0xffffffff); /* Clear ecm errors */
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out_be32(&ecm->eeer, 0xffffffff); /* Enable ecm errors */
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return 0;
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}
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static void flash_cs_fixup(void)
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{
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int flash_sel;
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/*
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* Print boot dev and swap flash flash chip selects if booted from 2nd
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* flash. Swapping chip selects presents user with a common memory
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* map regardless of which flash was booted from.
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*/
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flash_sel = !((pca953x_get_val(CONFIG_SYS_I2C_PCA953X_ADDR0) &
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CONFIG_SYS_PCA953X_FLASH_PASS_CS));
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printf("FLASH: Executed from FLASH%d\n", flash_sel ? 2 : 1);
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if (flash_sel) {
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set_lbc_br(0, CONFIG_SYS_BR1_PRELIM);
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set_lbc_or(0, CONFIG_SYS_OR1_PRELIM);
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set_lbc_br(1, CONFIG_SYS_BR0_PRELIM);
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set_lbc_or(1, CONFIG_SYS_OR0_PRELIM);
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}
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}
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int board_early_init_r(void)
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{
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/* Initialize PCA9557 devices */
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR0, 0xff, 0);
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pca953x_set_pol(CONFIG_SYS_I2C_PCA953X_ADDR1, 0xff, 0);
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/*
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* Remap NOR flash region to caching-inhibited
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* so that flash can be erased/programmed properly.
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*/
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/* Flush d-cache and invalidate i-cache of any FLASH data */
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flush_dcache();
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invalidate_icache();
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/* Invalidate existing TLB entry for NOR flash */
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disable_tlb(0);
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set_tlb(1, (CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
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(CONFIG_SYS_FLASH_BASE2 & 0xf0000000),
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MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
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0, 0, BOOKE_PAGESZ_256M, 1);
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flash_cs_fixup();
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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void ft_board_setup(void *blob, bd_t *bd)
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{
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#ifdef CONFIG_PCI
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ft_board_pci_setup(blob, bd);
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#endif
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ft_cpu_setup(blob, bd);
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}
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#endif
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