u-boot/arch/arm/cpu/armv7
Siarhei Siamashka f8e88b6837 sunxi: dram: Fix CKE delay handling for sun4i/sun5i
Before driving the CKE pin (Clock Enable) high, the DDR3 spec requires
to wait for additional 500 us after the RESET pin is de-asserted.

The DRAM controller takes care of this delay by itself, using a
configurable counter in the SDR_IDCR register. This works in the same
way on sun4i/sun5i/sun7i hardware (even the default register value
0x00c80064 is identical). Except that the counter is ticking a bit
slower on sun7i (3 DRAM clock cycles instead of 2), resulting in
longer actual delays for the same settings.

This patch configures the SDR_IDCR register for all sun4i/sun5i/sun7i
SoC variants and not just for sun7i alone. Also an explicit udelay(500)
is added immediately after DDR3 reset for extra safety. This is a
duplicated functionality. But since we don't have perfect documentation,
it may be reasonable to play safe. Half a millisecond boot time increase
is not that significant. Boot time can be always optimized later.
Preferebly by the people, who have the hardware equipment to check the
actual signals on the RESET and CKE lines and verify all the timings.

The old code did not configure the SDR_IDCR register for sun4i/sun5i,
but performed the DDR3 reset very early for sun4i/sun5i. This resulted
in a larger time gap between the DDR3 reset and the DDR3 initialization
steps and reduced the chances of CKE delay timing violation to cause
real troubles.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2014-08-12 08:42:32 +02:00
..
am33xx am43xx: Tune the system to avoid DSS underflows 2014-07-07 19:42:34 -04:00
at91 ARMv7: at91: enable ICache and DCache. 2014-06-14 18:07:03 +02:00
bcm281xx arch: bcm281xx: Initial commit of bcm281xx architecture code 2014-02-22 19:30:24 +01:00
exynos Merge remote-tracking branch 'u-boot-samsung/master' 2014-07-01 20:52:51 +02:00
highbank ARM: highbank: convert to common timer code 2013-11-04 11:08:10 -05:00
keystone ARM: keystone2: spl: add K2E SoC support 2014-07-25 16:26:11 -04:00
kona-common sizes.h - consolidate for all architectures 2014-03-04 12:15:01 -05:00
mx5 kbuild: move asm-offsets.c from SoC directory to arch/$(ARCH)/lib 2014-03-28 15:06:29 -04:00
mx6 mx6: soc: Update the comments of set_ldo_voltage() 2014-07-09 15:10:10 +02:00
omap-common ARM: omap: clean redundant PISMO_xx macros used in OMAP3 2014-07-25 16:26:12 -04:00
omap3 ARM: omap: Remove unused arch/arm/cpu/armv7/omap3/mem.c 2014-07-25 16:26:09 -04:00
omap4 sizes.h - consolidate for all architectures 2014-03-04 12:15:01 -05:00
omap5 ARM: DRA7xx: ctrl: Fix efuse register addresses 2014-05-23 19:40:04 -04:00
rmobile arm: rmobile: Add support R8A7794 2014-07-24 14:03:46 +09:00
s5p-common armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
s5pc1xx armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
socfpga socfpga: Relocate arch common functions away from board 2014-07-05 10:14:46 +02:00
sunxi sunxi: dram: Fix CKE delay handling for sun4i/sun5i 2014-08-12 08:42:32 +02:00
tegra-common armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
tegra20 tegra20: display: fix checking of return value 2014-06-19 09:18:05 -07:00
tegra30 kbuild: add dummy obj-y to create built-in.o 2014-02-19 11:07:50 -05:00
tegra114 kbuild: add dummy obj-y to create built-in.o 2014-02-19 11:07:50 -05:00
tegra124 arm: delete unused macro CONFIG_ARCH_DEVICE_TREE 2014-02-24 10:56:33 -05:00
u8500 armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
vf610 armv7: convert makefiles to Kbuild style 2013-10-31 12:53:39 -04:00
zynq ARM: zynq: Show ECC status on the same line as DRAM size 2014-07-23 15:36:55 +02:00
arch_timer.c arm: add support for arch timer 2014-04-17 17:24:38 -04:00
cache_v7.c ARM: cache_v7: use __weak 2014-07-04 19:57:22 +02:00
config.mk Merge branch 'master' of git://git.denx.de/u-boot-arm 2014-02-26 16:49:58 -05:00
cpu.c Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24 09:44:38 -04:00
lowlevel_init.S arm: use canonical sub mnemonic 2014-01-14 12:38:47 +01:00
Makefile ARM: HYP/non-sec/PSCI: emit DT nodes 2014-07-28 17:19:52 +02:00
nonsec_virt.S ARM: HYP/non-sec: add the option for a second-stage monitor 2014-07-28 17:19:26 +02:00
psci.S ARM: HYP/non-sec: add generic ARMv7 PSCI code 2014-07-28 17:19:18 +02:00
start.S arm: move exception handling out of start.S files 2014-05-15 16:24:53 +02:00
syslib.c ARM: OMAP: hide custom bit manipulation function sr32() 2014-04-17 14:39:54 -04:00
virt-dt.c ARM: HYP/non-sec/PSCI: emit DT nodes 2014-07-28 17:19:52 +02:00
virt-v7.c ARM: HYP/non-sec: remove MIDR check to validate CBAR 2014-07-28 17:19:55 +02:00