mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-16 17:58:23 +00:00
ce1cbf1ae0
Before the culprit patch (see BugLink for the details):
=> acpi list
Name Base Size Detail
---- -------- ----- ------
RSDP 000e4500 24 v02 U-BOOT
RSDT 000e4530 38 v01 U-BOOT U-BOOTBL 20220401 INTL 0
XSDT 000e45e0 4c v01 U-BOOT U-BOOTBL 20220401 INTL 0
CSRT 000e5490 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0
FACP 000e54f0 114 v06 U-BOOT U-BOOTBL 20220401 INTL 0
DSDT 000e4780 c06 v02 U-BOOT U-BOOTBL 10000 INTL 20200925
FACS 000e4740 40
MCFG 000e5610 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0
SPCR 000e5650 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0
APIC 000e56a0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0
After the culprit patch:
=> acpi list
Name Base Size Detail
---- -------- ----- ------
RSDP 000e4500 24 v02 U-BOOT
RSDT 000e4530 34 v01 U-BOOT U-BOOTBL 20220401 INTL 0
XSDT 000e45e0 44 v01 U-BOOT U-BOOTBL 20220401 INTL 0
CSRT 000e53a0 58 v00 U-BOOT U-BOOTBL 20220401 INTL 0
MCFG 000e5520 3c v01 U-BOOT U-BOOTBL 20220401 INTL 0
SPCR 000e5560 50 v02 U-BOOT U-BOOTBL 20220401 INTL 0
APIC 000e55b0 48 v02 U-BOOT U-BOOTBL 20220401 INTL 0
As a result Linux kernel can't find mandatory tables and fails
to boot.
Hence, revert it for good.
This reverts commit 379d3c1fd6.
BugLink: https://lore.kernel.org/all/20220131225930.GJ7515@bill-the-cat/
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
217 lines
5.9 KiB
C
217 lines
5.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
/*
|
|
* Based on acpi.c from coreboot
|
|
*
|
|
* Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
|
|
* Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
|
|
*/
|
|
|
|
#ifndef __ASM_ACPI_TABLE_H__
|
|
#define __ASM_ACPI_TABLE_H__
|
|
|
|
#ifndef __ACPI__
|
|
|
|
#include <pci.h>
|
|
|
|
struct acpi_facs;
|
|
struct acpi_fadt;
|
|
struct acpi_global_nvs;
|
|
struct acpi_madt_ioapic;
|
|
struct acpi_madt_irqoverride;
|
|
struct acpi_madt_lapic_nmi;
|
|
struct acpi_mcfg_mmconfig;
|
|
struct acpi_table_header;
|
|
|
|
/* These can be used by the target port */
|
|
|
|
void acpi_create_fadt(struct acpi_fadt *fadt, struct acpi_facs *facs,
|
|
void *dsdt);
|
|
int acpi_create_madt_lapics(u32 current);
|
|
int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
|
|
u32 addr, u32 gsi_base);
|
|
int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
|
|
u8 bus, u8 source, u32 gsirq, u16 flags);
|
|
int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
|
|
u8 cpu, u16 flags, u8 lint);
|
|
u32 acpi_fill_madt(u32 current);
|
|
int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
|
|
u16 seg_nr, u8 start, u8 end);
|
|
|
|
/**
|
|
* acpi_write_hpet() - Write out a HPET table
|
|
*
|
|
* Write out the table for High-Precision Event Timers
|
|
*
|
|
* @ctx: Current ACPI context
|
|
* Return: 0 if OK, -ve on error
|
|
*/
|
|
int acpi_write_hpet(struct acpi_ctx *ctx);
|
|
|
|
/**
|
|
* acpi_write_dbg2_pci_uart() - Write out a DBG2 table
|
|
*
|
|
* @ctx: Current ACPI context
|
|
* @dev: Debug UART device to describe
|
|
* @access_size: Access size for UART (e.g. ACPI_ACCESS_SIZE_DWORD_ACCESS)
|
|
* Return: 0 if OK, -ve on error
|
|
*/
|
|
int acpi_write_dbg2_pci_uart(struct acpi_ctx *ctx, struct udevice *dev,
|
|
uint access_size);
|
|
|
|
/**
|
|
* acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table
|
|
*
|
|
* @gnvs: Table to fill in
|
|
* Return: 0 if OK, -ve on error
|
|
*/
|
|
int acpi_create_gnvs(struct acpi_global_nvs *gnvs);
|
|
|
|
/**
|
|
* acpi_get_rsdp_addr() - get ACPI RSDP table address
|
|
*
|
|
* This routine returns the ACPI RSDP table address in the system memory.
|
|
*
|
|
* @return: ACPI RSDP table address
|
|
*/
|
|
ulong acpi_get_rsdp_addr(void);
|
|
|
|
/**
|
|
* arch_read_sci_irq_select() - Read the system-control interrupt number
|
|
*
|
|
* @returns value of IRQ register in the PMC
|
|
*/
|
|
int arch_read_sci_irq_select(void);
|
|
|
|
/**
|
|
* arch_write_sci_irq_select() - Set the system-control interrupt number
|
|
*
|
|
* @scis: New value for IRQ register in the PMC
|
|
*/
|
|
int arch_write_sci_irq_select(uint scis);
|
|
|
|
/**
|
|
* arch_madt_sci_irq_polarity() - Return the priority to use for the MADT
|
|
*
|
|
* @sci: System-control interrupt number
|
|
* Return: priority to use (MP_IRQ_POLARITY_...)
|
|
*/
|
|
int arch_madt_sci_irq_polarity(int sci);
|
|
|
|
/**
|
|
* acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU
|
|
*
|
|
* See here for the specification
|
|
* https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @flags: (DRHD_INCLUDE_...)
|
|
* @segment: PCI segment asscociated with this unit
|
|
* @bar: Base address of remapping hardware register-set for this unit
|
|
*/
|
|
void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
|
|
u64 bar);
|
|
|
|
/**
|
|
* acpi_create_dmar_rmrr() - Set up an RMRR
|
|
*
|
|
* This sets up a Reserved-Memory Region Reporting structure, used to allow
|
|
* DMA to regions used by devices that the BIOS controls.
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @segment: PCI segment asscociated with this unit
|
|
* @bar: Base address of mapping
|
|
* @limit: End address of mapping
|
|
*/
|
|
void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
|
|
u64 limit);
|
|
|
|
/**
|
|
* acpi_dmar_drhd_fixup() - Set the length of an DRHD
|
|
*
|
|
* This sets the DRHD length field based on the current ctx->current
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @base: Address of the start of the DRHD
|
|
*/
|
|
void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base);
|
|
|
|
/**
|
|
* acpi_dmar_rmrr_fixup() - Set the length of an RMRR
|
|
*
|
|
* This sets the RMRR length field based on the current ctx->current
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @base: Address of the start of the RMRR
|
|
*/
|
|
void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base);
|
|
|
|
/**
|
|
* acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @bdf: PCI device to add
|
|
* Return: length of mapping in bytes
|
|
*/
|
|
int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf);
|
|
|
|
/**
|
|
* acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge
|
|
*
|
|
* This is used to provide a mapping for a PCI bridge
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @bdf: PCI device to add
|
|
* Return: length of mapping in bytes
|
|
*/
|
|
int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf);
|
|
|
|
/**
|
|
* acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @enumeration_id: Enumeration ID (typically 2)
|
|
* @bdf: PCI device to add
|
|
* Return: length of mapping in bytes
|
|
*/
|
|
int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
|
|
pci_dev_t bdf);
|
|
|
|
/**
|
|
* acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET
|
|
*
|
|
* Sets up a scope for a High-Precision Event Timer that supports
|
|
* Message-Signalled Interrupts
|
|
*
|
|
* @ctx: ACPI context pointer
|
|
* @enumeration_id: Enumeration ID (typically 0)
|
|
* @bdf: PCI device to add
|
|
* Return: length of mapping in bytes
|
|
*/
|
|
int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
|
|
pci_dev_t bdf);
|
|
|
|
/**
|
|
* acpi_fadt_common() - Handle common parts of filling out an FADT
|
|
*
|
|
* This sets up the Fixed ACPI Description Table
|
|
*
|
|
* @fadt: Pointer to place to put FADT
|
|
* @facs: Pointer to the FACS
|
|
* @dsdt: Pointer to the DSDT
|
|
*/
|
|
void acpi_fadt_common(struct acpi_fadt *fadt, struct acpi_facs *facs,
|
|
void *dsdt);
|
|
|
|
/**
|
|
* intel_acpi_fill_fadt() - Set up the contents of the FADT
|
|
*
|
|
* This sets up parts of the Fixed ACPI Description Table that are common to
|
|
* Intel chips
|
|
*
|
|
* @fadt: Pointer to place to put FADT
|
|
*/
|
|
void intel_acpi_fill_fadt(struct acpi_fadt *fadt);
|
|
|
|
#endif /* !__ACPI__ */
|
|
|
|
#endif /* __ASM_ACPI_TABLE_H__ */
|