mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-11 13:56:30 +00:00
987a404aa1
Check whether a display device is in use before using it. Add a comment as to why two displays cannot currently be used at the same time. This allows us to remove the device-tree change that disables vopb on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
206 lines
4.1 KiB
Text
206 lines
4.1 KiB
Text
/*
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* Google Veyron (and derivatives) board device tree source
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*
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* Copyright 2014 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#include <dt-bindings/clock/rockchip,rk808.h>
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#include <dt-bindings/input/input.h>
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#include "rk3288-veyron.dtsi"
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/ {
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aliases {
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i2c20 = &i2c_tunnel;
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video0 = &vopl;
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video1 = &vopb;
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};
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gpio_keys: gpio-keys {
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pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
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lid {
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label = "Lid";
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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linux,code = <0>; /* SW_LID */
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linux,input-type = <5>; /* EV_SW */
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debounce-interval = <1>;
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gpio-key,wakeup;
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};
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};
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gpio-charger {
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compatible = "gpio-charger";
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gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&ac_present_ap>;
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charger-type = "mains";
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};
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/* A non-regulated voltage from power supply or battery */
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vccsys: vccsys {
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compatible = "regulator-fixed";
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regulator-name = "vccsys";
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regulator-boot-on;
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regulator-always-on;
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};
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vcc33_sys: vcc33-sys {
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vin-supply = <&vccsys>;
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};
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vcc_5v: vcc-5v {
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vin-supply = <&vccsys>;
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};
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/* This turns on vbus for host1 (dwc2) */
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vcc5_host1: vcc5-host1-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&host1_pwr_en>;
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regulator-name = "vcc5_host1";
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regulator-always-on;
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regulator-boot-on;
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};
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/* This turns on vbus for otg for host mode (dwc2) */
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vcc5v_otg: vcc5v-otg-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&usbotg_pwren_h>;
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regulator-name = "vcc5_host2";
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&rk808 {
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regulators {
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vcc33_ccd: LDO_REG8 {
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-name = "vcc33_ccd";
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regulator-suspend-mem-disabled;
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};
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};
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};
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&spi0 {
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status = "okay";
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spi-activate-delay = <100>;
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spi-max-frequency = <3000000>;
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spi-deactivate-delay = <200>;
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cros_ec: ec@0 {
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compatible = "google,cros-ec-spi";
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spi-max-frequency = <3000000>;
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interrupt-parent = <&gpio7>;
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interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
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ec-interrupt = <&gpio7 7 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&ec_int>;
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reg = <0>;
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google,cros-ec-spi-pre-delay = <30>;
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i2c_tunnel: i2c-tunnel {
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compatible = "google,cros-ec-i2c-tunnel";
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google,remote-bus = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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};
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&i2c4 {
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trackpad@15 {
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compatible = "elan,i2c_touchpad";
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interrupt-parent = <&gpio7>;
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interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
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pinctrl-names = "default";
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pinctrl-0 = <&trackpad_int>;
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reg = <0x15>;
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vcc-supply = <&vcc33_io>;
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wakeup-source;
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};
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};
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&pinctrl {
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pinctrl-0 = <
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/* Common for sleep and wake, but no owners */
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&ddr0_retention
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&ddrio_pwroff
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&global_pwroff
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/* Wake only */
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&suspend_l_wake
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&bt_dev_wake_awake
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>;
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pinctrl-1 = <
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/* Common for sleep and wake, but no owners */
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&ddr0_retention
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&ddrio_pwroff
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&global_pwroff
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/* Sleep only */
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&suspend_l_sleep
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&bt_dev_wake_sleep
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>;
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buttons {
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ap_lid_int_l: ap-lid-int-l {
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rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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charger {
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ac_present_ap: ac-present-ap {
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rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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cros-ec {
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ec_int: ec-int {
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rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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sdmmc_wp_gpio: sdmmc-wp-gpio {
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rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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suspend {
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suspend_l_wake: suspend-l-wake {
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rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
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};
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suspend_l_sleep: suspend-l-sleep {
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rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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trackpad {
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trackpad_int: trackpad-int {
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rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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usb-host {
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host1_pwr_en: host1-pwr-en {
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rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usbotg_pwren_h: usbotg-pwren-h {
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rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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#include "cros-ec-keyboard.dtsi"
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