u-boot/arch/x86
Bin Meng f7a01e4848 x86: baytrail: Configure card detect pin of the SD controller
As of today, the latest version FSP (gold4) for BayTrail misses the
PAD configuration of the SD controller's Card Detect signal. The
default PAD value for the CD pin sets the pin to work in GPIO mode,
which causes card detect status cannot be reflected by the Present
State register in the SD controller (bit 16 & bit 18 are always zero).

Add a configuration for this pin in the pinctrl node.

Note I've checked the PAD configuration for all the pins in all the
3 controllers (eMMC/SDIO/SD). Only this SDMMC3_CD_B pin does not get
initialized to correct mode by FSP. With fsp,emmc-boot-mode set to
2 (eMMC 4.1), eMMC pins are initialized to func 1, but if we set
fsp,emmc-boot-mode to 1 (auto), those pins are initialized to func 3
which is correct according to datasheet.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2016-06-12 12:19:35 +08:00
..
cpu x86: baytrail: acpi: Fix I/O APIC ID in the MADT table 2016-05-30 10:21:12 +08:00
dts x86: baytrail: Configure card detect pin of the SD controller 2016-06-12 12:19:35 +08:00
include/asm x86: quark: Add platform ASL files 2016-05-30 10:21:12 +08:00
lib x86: acpi: Fix madt lapic generation 2016-06-12 12:19:35 +08:00
config.mk efi: Add 64-bit payload support 2015-08-05 08:44:07 -06:00
Kconfig x86: kconfig: Add two options for SMBIOS manufacturer and product name 2016-05-23 15:27:42 +08:00
Makefile x86: Add support for U-Boot as an EFI application 2015-08-05 08:44:06 -06:00