mirror of
https://github.com/AsahiLinux/u-boot
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148 lines
3.2 KiB
C
148 lines
3.2 KiB
C
/*
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* (C) Copyright 2003
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* Texas Instruments <www.ti.com>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002-2004
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* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
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*
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* (C) Copyright 2004
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* Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <arm926ejs.h>
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typedef volatile struct {
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u_int32_t pid12;
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u_int32_t emumgt;
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u_int32_t na1;
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u_int32_t na2;
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u_int32_t tim12;
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u_int32_t tim34;
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u_int32_t prd12;
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u_int32_t prd34;
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u_int32_t tcr;
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u_int32_t tgcr;
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u_int32_t wdtcr;
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} davinci_timer;
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davinci_timer *timer = (davinci_timer *)CONFIG_SYS_TIMERBASE;
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#define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
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#define TIM_CLK_DIV 16
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static ulong timestamp;
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static ulong lastinc;
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int timer_init(void)
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{
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/* We are using timer34 in unchained 32-bit mode, full speed */
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timer->tcr = 0x0;
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timer->tgcr = 0x0;
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timer->tgcr = 0x06 | ((TIM_CLK_DIV - 1) << 8);
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timer->tim34 = 0x0;
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timer->prd34 = TIMER_LOAD_VAL;
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lastinc = 0;
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timestamp = 0;
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timer->tcr = 2 << 22;
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return(0);
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}
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void reset_timer(void)
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{
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timer->tcr = 0x0;
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timer->tim34 = 0;
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lastinc = 0;
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timestamp = 0;
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timer->tcr = 2 << 22;
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}
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static ulong get_timer_raw(void)
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{
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ulong now = timer->tim34;
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if (now >= lastinc) {
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/* normal mode */
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timestamp += now - lastinc;
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} else {
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/* overflow ... */
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timestamp += now + TIMER_LOAD_VAL - lastinc;
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}
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lastinc = now;
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return timestamp;
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}
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ulong get_timer(ulong base)
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{
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return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base);
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}
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void set_timer(ulong t)
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{
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timestamp = t;
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}
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void udelay(unsigned long usec)
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{
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ulong tmo;
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ulong endtime;
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signed long diff;
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tmo = CONFIG_SYS_HZ_CLOCK / 1000;
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tmo *= usec;
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tmo /= (1000 * TIM_CLK_DIV);
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endtime = get_timer_raw() + tmo;
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do {
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ulong now = get_timer_raw();
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diff = endtime - now;
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} while (diff >= 0);
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}
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/*
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* This function is derived from PowerPC code (read timebase as long long).
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* On ARM it just returns the timer value.
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*/
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unsigned long long get_ticks(void)
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{
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return(get_timer(0));
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}
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/*
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* This function is derived from PowerPC code (timebase clock frequency).
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* On ARM it returns the number of timer ticks per second.
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*/
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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