Heiko Stübner f785357073 rockchip: clk: rk3188: Allow configuration of the armclk ... The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole startup take a lot of time. We therefore want to at least move to the safe 600MHz value we can use with default pmic settings. This is also the freqency the proprietary sdram-init leaves the cpu at. For boards that have pmic control later in u-boot, we also add the option to set the maximum frequency of 1.6GHz, if they so desire. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>		2017-04-04 20:01:57 -06:00
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clk_rk3036.c	rockchip: rk3036: Move rockchip_get_cru() out of the driver	2016-10-30 13:29:06 -06:00
clk_rk3188.c	rockchip: clk: rk3188: Allow configuration of the armclk	2017-04-04 20:01:57 -06:00
clk_rk3288.c	rockchip: clk: rk3288: limit gpll and cpll init to SPL build	2017-03-16 16:03:44 -06:00
clk_rk3328.c	rockchip: rk3328: add clock driver	2017-03-16 16:03:46 -06:00
clk_rk3399.c	rockchip: clk: rk3399: update driver for spl	2017-03-16 16:03:43 -06:00
Makefile	rockchip: rk3328: add clock driver	2017-03-16 16:03:46 -06:00