u-boot/arch/riscv/cpu/fu540/Kconfig
Sean Anderson c33efafaf9 riscv: Rework riscv timer driver to only support S-mode
The riscv-timer driver currently serves as a shim for several riscv timer
drivers. This is not too desirable because it bypasses the usual timer
selection via the driver model. There is no easy way to specify an
alternate timing driver, or have the tick rate depend on the cpu's
configured frequency. The timer drivers also do not have device structs,
and so have to rely on storing parameters in gd_t. Lastly, there is no
initialization call, so driver init is done in the same function which
reads the time. This can result in confusing error messages. To a user, it
looks like the driver failed when trying to read the time, whereas it may
have failed while initializing.

This patch removes the shim functionality from the riscv-timer driver, and
has it instead implement the former rdtime.c timer driver. This is because
existing u-boot users who pass in a device tree (e.g. qemu) do not create a
timer device for S-mode u-boot. The existing behavior of creating the
riscv-timer device in the riscv cpu driver must be kept. The actual reading
of the CSRs has been redone in the style of Linux's get_cycles64.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-30 08:54:45 +08:00

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# SPDX-License-Identifier: GPL-2.0+
#
# Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
config SIFIVE_FU540
bool
select ARCH_EARLY_INIT_R
select SUPPORT_SPL
select RAM
select SPL_RAM if SPL
imply CPU
imply CPU_RISCV
imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE)
imply SIFIVE_CLINT if (RISCV_MMODE || SPL_RISCV_MMODE)
imply CMD_CPU
imply SPL_CPU_SUPPORT
imply SPL_OPENSBI
imply SPL_LOAD_FIT
imply SMP
imply CLK_SIFIVE
imply CLK_SIFIVE_FU540_PRCI
imply SIFIVE_SERIAL
imply MACB
imply MII
imply SPI
imply SPI_SIFIVE
imply MMC
imply MMC_SPI
imply MMC_BROKEN_CD
imply CMD_MMC
imply DM_GPIO
imply SIFIVE_GPIO
imply CMD_GPIO
imply MISC
imply SIFIVE_OTP
imply DM_PWM
imply PWM_SIFIVE
if ENV_IS_IN_SPI_FLASH
config ENV_OFFSET
default 0x505000
config ENV_SIZE
default 0x20000
config ENV_SECT_SIZE
default 0x10000
endif # ENV_IS_IN_SPI_FLASH