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These headers provide access to additional Tegra features. flow - start/stop CPUs sdram - parameters for SDRAM fuse - access to on-chip fuses / security settings gp_padctl - pad control and general purpose registers Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Yen Lin <yelin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
39 lines
1.3 KiB
C
39 lines
1.3 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef _FUSE_H_
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#define _FUSE_H_
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/* FUSE registers */
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struct fuse_regs {
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u32 reserved0[64]; /* 0x00 - 0xFC: */
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u32 production_mode; /* 0x100: FUSE_PRODUCTION_MODE */
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u32 reserved1[3]; /* 0x104 - 0x10c: */
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u32 sku_info; /* 0x110 */
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u32 reserved2[13]; /* 0x114 - 0x144: */
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u32 fa; /* 0x148: FUSE_FA */
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u32 reserved3[21]; /* 0x14C - 0x19C: */
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u32 security_mode; /* 0x1A0: FUSE_SECURITY_MODE */
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};
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#endif /* ifndef _FUSE_H_ */
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