mirror of
https://github.com/AsahiLinux/u-boot
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f76750d111
This converts the following to Kconfig: CONFIG_CONS_INDEX CONFIG_DEBUG_UART_CLOCK CONFIG_FSL_TZPC_BP147 CONFIG_GENERIC_ATMEL_MCI CONFIG_IDENT_STRING CONFIG_LIBATA CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_LPC32XX_GPIO CONFIG_MP CONFIG_MPC8XXX_GPIO CONFIG_MTD_PARTITIONS CONFIG_MVGBE CONFIG_MXC_GPIO CONFIG_NR_DRAM_BANKS CONFIG_OF_BOARD_SETUP CONFIG_OF_STDOUT_VIA_ALIAS CONFIG_OF_SYSTEM_SETUP CONFIG_PREBOOT CONFIG_ROCKCHIP_SERIAL CONFIG_RTC_ENABLE_32KHZ_OUTPUT CONFIG_RTC_MV CONFIG_SCSI_AHCI CONFIG_SF_DEFAULT_BUS CONFIG_SF_DEFAULT_CS CONFIG_SF_DEFAULT_SPEED CONFIG_SOFT_SPI CONFIG_SPI_FLASH_EON CONFIG_SPI_FLASH_MACRONIX CONFIG_SPI_FLASH_MTD CONFIG_SPI_FLASH_SPANSION CONFIG_SPI_FLASH_SST CONFIG_SPI_FLASH_STMICRO CONFIG_SUPPORT_RAW_INITRD CONFIG_SYS_ARCH_TIMER CONFIG_SYS_BOARD CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE CONFIG_SYS_DCACHE_OFF CONFIG_SYS_FDT_SAVE_ADDRESS CONFIG_SYS_FLASH_CFI CONFIG_SYS_FSL_ERRATUM_ESDHC135 CONFIG_SYS_HAS_SERDES CONFIG_SYS_L2CACHE_OFF CONFIG_SYS_LITTLE_ENDIAN CONFIG_SYS_LOAD_ADDR CONFIG_SYS_MMCSD_FS_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR CONFIG_SYS_NS16550 CONFIG_SYS_PLLFIN CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_TIMER_SYS_TICK_CH CONFIG_USB_EHCI_FSL CONFIG_U_QE CONFIG_VERSION_VARIABLE Signed-off-by: Tom Rini <trini@konsulko.com>
171 lines
5.1 KiB
C
171 lines
5.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2011 Samsung Electronics
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* Heungjun Kim <riverful.kim@samsung.com>
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*
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* Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
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*/
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#ifndef __CONFIG_TRATS_H
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#define __CONFIG_TRATS_H
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#include <configs/exynos4-common.h>
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#define CONFIG_TRATS
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#define CONFIG_TIZEN /* TIZEN lib */
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#ifndef CONFIG_SYS_L2CACHE_OFF
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#define CONFIG_SYS_L2_PL310
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#define CONFIG_SYS_PL310_BASE 0x10502000
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#endif
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/* TRATS has 4 banks of DRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
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#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
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- GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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/* Tizen - partitions definitions */
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#define PARTS_CSA "csa-mmc"
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#define PARTS_BOOT "boot"
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#define PARTS_QBOOT "qboot"
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#define PARTS_CSC "csc"
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#define PARTS_ROOT "platform"
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#define PARTS_DATA "data"
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#define PARTS_UMS "ums"
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#define PARTS_DEFAULT \
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"uuid_disk=${uuid_gpt_disk};" \
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"name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
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"name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
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"name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
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"name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
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"name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
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"name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
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"name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
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#define CONFIG_DFU_ALT \
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"u-boot raw 0x80 0x400;" \
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"/uImage ext4 0 2;" \
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"/modem.bin ext4 0 2;" \
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"/exynos4210-trats.dtb ext4 0 2;" \
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""PARTS_CSA" part 0 1;" \
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""PARTS_BOOT" part 0 2;" \
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""PARTS_QBOOT" part 0 3;" \
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""PARTS_CSC" part 0 4;" \
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""PARTS_ROOT" part 0 5;" \
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""PARTS_DATA" part 0 6;" \
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""PARTS_UMS" part 0 7;" \
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"params.bin raw 0x38 0x8;" \
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"/Image.itb ext4 0 2\0"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"bootk=" \
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"run loaduimage;" \
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"if run loaddtb; then " \
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"bootm 0x40007FC0 - ${fdtaddr};" \
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"fi;" \
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"bootm 0x40007FC0;\0" \
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"updatebackup=" \
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"mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
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"mmc dev 0 0\0" \
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"updatebootb=" \
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"mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
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"lpj=lpj=3981312\0" \
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"nfsboot=" \
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"setenv bootargs root=/dev/nfs rw " \
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"nfsroot=${nfsroot},nolock,tcp " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:" \
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"${netmask}:generic:usb0:off ${console} ${meminfo}" \
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"; run bootk\0" \
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"ramfsboot=" \
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"setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
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"${console} ${meminfo} " \
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"initrd=0x43000000,8M ramdisk=8192\0" \
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"mmcboot=" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
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"run bootk\0" \
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"bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
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"boottrace=setenv opts initcall_debug; run bootcmd\0" \
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"mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
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"verify=n\0" \
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"rootfstype=ext4\0" \
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"console=console=ttySAC2,115200n8\0" \
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"meminfo=crashkernel=32M@0x50000000\0" \
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"nfsroot=/nfsroot/arm\0" \
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"bootblock=10\0" \
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"loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
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"loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
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"${fdtfile}\0" \
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"mmcdev=0\0" \
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"mmcbootpart=2\0" \
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"mmcrootpart=5\0" \
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"opts=always_resume=1\0" \
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"partitions=" PARTS_DEFAULT \
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"dfu_alt_info=" CONFIG_DFU_ALT \
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"spladdr=0x40000100\0" \
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"splsize=0x200\0" \
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"splfile=falcon.bin\0" \
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"spl_export=" \
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"setexpr spl_imgsize ${splsize} + 8 ;" \
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"setenv spl_imgsize 0x${spl_imgsize};" \
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"setexpr spl_imgaddr ${spladdr} - 8 ;" \
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"setexpr spl_addr_tmp ${spladdr} - 4 ;" \
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"mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
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"setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
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"${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
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"spl export atags 0x40007FC0;" \
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"crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
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"mw.l ${spl_addr_tmp} ${splsize};" \
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"ext4write mmc ${mmcdev}:${mmcbootpart}" \
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" /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
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"setenv spl_imgsize;" \
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"setenv spl_imgaddr;" \
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"setenv spl_addr_tmp;\0" \
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ENV_ITB \
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"fdtaddr=40800000\0" \
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/* Falcon mode definitions */
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#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
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/* GPT */
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/* Security subsystem - enable hw_rand() */
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#define CONFIG_EXYNOS_ACE_SHA
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/* Common misc for Samsung */
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#define CONFIG_MISC_COMMON
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/* Download menu - Samsung common */
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#define CONFIG_LCD_MENU
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/* Download menu - definitions for check keys */
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#ifndef __ASSEMBLY__
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#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
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#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
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#define KEY_PWR_STATUS_MASK (1 << 0)
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#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
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#define KEY_PWR_INTERRUPT_MASK (1 << 0)
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#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
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#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
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#endif /* __ASSEMBLY__ */
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/* LCD console */
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#define LCD_BPP LCD_COLOR16
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/* LCD */
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#define CONFIG_FB_ADDR 0x52504000
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#define CONFIG_EXYNOS_MIPI_DSIM
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#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
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#endif /* __CONFIG_H */
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