mirror of
https://github.com/AsahiLinux/u-boot
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45 lines
1.5 KiB
C
45 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (C) 2020-2021 Intel Corporation <www.intel.com>
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*
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*/
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#ifndef __CONFIG_SOCFGPA_N5X_H__
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#define __CONFIG_SOCFGPA_N5X_H__
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#include <configs/socfpga_soc64_common.h>
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#undef CONFIG_EXTRA_ENV_SETTINGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
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"bootfile=" CONFIG_BOOTFILE "\0" \
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"fdt_addr=1100000\0" \
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"fdtimage=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
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"mmcroot=/dev/mmcblk0p2\0" \
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"mmcboot=setenv bootargs " CONFIG_BOOTARGS \
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" root=${mmcroot} rw rootwait;" \
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"booti ${loadaddr} - ${fdt_addr}\0" \
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"mmcload=mmc rescan;" \
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"load mmc 0:1 ${loadaddr} ${bootfile};" \
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"load mmc 0:1 ${fdt_addr} ${fdtimage}\0" \
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"mmcfitboot=setenv bootargs " CONFIG_BOOTARGS \
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" root=${mmcroot} rw rootwait;" \
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"bootm ${loadaddr}\0" \
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"mmcfitload=mmc rescan;" \
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"load mmc 0:1 ${loadaddr} ${bootfile}\0" \
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"ramboot=setenv bootargs " CONFIG_BOOTARGS";" \
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"booti ${loadaddr} - ${fdt_addr}\0" \
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"linux_qspi_enable=if sf probe; then " \
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"echo Enabling QSPI at Linux DTB...;" \
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"fdt addr ${fdt_addr}; fdt resize;" \
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"fdt set /soc/spi@ff8d2000 status okay;" \
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"if fdt set /soc/clocks/qspi-clk clock-frequency" \
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" ${qspi_clock}; then" \
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" else fdt set /soc/clkmgr/clocks/qspi_clk clock-frequency" \
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" ${qspi_clock}; fi; fi\0" \
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"scriptaddr=0x02100000\0" \
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"scriptfile=u-boot.scr\0" \
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"fatscript=if fatload mmc 0:1 ${scriptaddr} ${scriptfile};" \
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"then source ${scriptaddr}; fi\0"
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#endif /* __CONFIG_SOCFGPA_N5X_H__ */
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