u-boot/arch/arm/include/asm/arch-rockchip/boot0.h
Kever Yang fa1392a236 rockchip: reserve memory for rk3399 ATF data
There are 3 regions used by rk3399 ATF:
- bl31 code, located at 0x10000;
- cortex-m0 code and data, located at 0xff8c0000;
- bl31 data, located at 0xff8c1000 ~ 0xff8c4000;

SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory
for ATF data, or else there will be memory corrupt after SPL
loads the ATF image.

More detail about cortex-M0 code in ATF:
https://github.com/ARM-software/arm-trusted-firmware/commit/
8382e17c4c6bffd15119dfce1ee4372e3c1a7890

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10 13:37:21 -06:00

22 lines
584 B
C

/*
* Copyright 2017 Theobroma Systems Design und Consulting GmbH
*
* SPDX-License-Identifier: GPL-2.0+
*/
/*
* Execution starts on the instruction following this 4-byte header
* (containing the magic 'RK33').
*
* To make life easier for everyone, we build the SPL binary with
* space for this 4-byte header already included in the binary.
*/
#ifdef CONFIG_SPL_BUILD
.space 0x4 /* space for the 'RK33' */
#endif
b reset
#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
.space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
#endif