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f60c6fbbc6
Set only the 0-3 bits of the FPGA_RST_CTRL register as other bits should not be set to 1. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: Nathan Rossi <nathan.rossi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> |
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.. | ||
cpu | ||
dts | ||
imx-common | ||
include | ||
lib | ||
mvebu-common | ||
config.mk | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |