mirror of
https://github.com/AsahiLinux/u-boot
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150 lines
3.9 KiB
C
150 lines
3.9 KiB
C
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/io.h>
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#include <asm/pci.h>
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#undef PCI_ROM_SCAN_VERBOSE
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int pci_shadow_rom(pci_dev_t dev, unsigned char *dest)
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{
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struct pci_controller *hose;
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int res = -1;
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int i;
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u32 rom_addr;
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u32 addr_reg;
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u32 size;
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u16 vendor;
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u16 device;
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u32 class_code;
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hose = pci_bus_to_hose(PCI_BUS(dev));
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#if 0
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printf("pci_shadow_rom() asked to shadow device %x to %x\n",
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dev, (u32)dest);
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#endif
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pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
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pci_read_config_word(dev, PCI_DEVICE_ID, &device);
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pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code);
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class_code &= 0xffffff00;
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class_code >>= 8;
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debug("PCI Header Vendor %04x device %04x class %06x\n",
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vendor, device, class_code);
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/* Enable the rom addess decoder */
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pci_write_config_dword(dev, PCI_ROM_ADDRESS, (u32)PCI_ROM_ADDRESS_MASK);
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pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg);
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if (!addr_reg) {
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/* register unimplemented */
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printf("pci_chadow_rom: device do not seem to have a rom\n");
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return -1;
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}
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size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1;
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debug("ROM is %d bytes\n", size);
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rom_addr = pci_get_rom_window(hose, size);
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debug("ROM mapped at %x\n", rom_addr);
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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pci_phys_to_mem(dev, rom_addr)
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|PCI_ROM_ADDRESS_ENABLE);
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for (i=rom_addr;i<rom_addr+size; i+=512) {
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if (readw(i) == 0xaa55) {
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u32 pci_data;
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("ROM signature found\n");
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#endif
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pci_data = readw(0x18+i);
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pci_data += i;
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if (0==memcmp((void*)pci_data, "PCIR", 4)) {
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("Fount PCI rom image at offset %d\n", i-rom_addr);
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printf("Vendor %04x device %04x class %06x\n",
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readw(pci_data+4), readw(pci_data+6),
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readl(pci_data+0x0d)&0xffffff);
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printf("%s\n",
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(readw(pci_data+0x15) &0x80)?
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"Last image":"More images follow");
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switch (readb(pci_data+0x14)) {
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case 0:
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printf("X86 code\n");
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break;
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case 1:
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printf("Openfirmware code\n");
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break;
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case 2:
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printf("PARISC code\n");
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break;
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}
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printf("Image size %d\n", readw(pci_data+0x10) * 512);
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#endif
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/* FixMe: I think we should compare the class code
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* bytes as well but I have no reference on the
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* exact order of these bytes in the PCI ROM header */
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if (readw(pci_data+4) == vendor &&
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readw(pci_data+6) == device &&
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/* (readl(pci_data+0x0d)&0xffffff) == class_code && */
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readb(pci_data+0x14) == 0 /* x86 code image */ ) {
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#ifdef PCI_ROM_SCAN_VERBOSE
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printf("Suitable ROM image found, copying\n");
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#endif
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memmove(dest, (void*)rom_addr, readw(pci_data+0x10) * 512);
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res = 0;
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break;
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}
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if (readw(pci_data+0x15) &0x80) {
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break;
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}
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}
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}
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}
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#ifdef PCI_ROM_SCAN_VERBOSE
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if (res) {
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printf("No suitable image found\n");
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}
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#endif
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/* disable PAR register and PCI device ROM address devocer */
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pci_remove_rom_window(hose, rom_addr);
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pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
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return res;
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}
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