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Tegra20's PCIe controller has a couple of quirks. There are workarounds in
the driver for these, but they don't work after the DM conversion:
1) The PCI_CLASS value is wrong in HW.
This is worked around in pci_tegra_read_config() by patching up the value
read from that register. Pre-DM, the PCIe core always read this via a
16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used,
so we need to check for offset 0x8 instead. Mask the offset value back to
32-bit alignment to make this work in all cases.
2) Accessing devices other than dev 1 causes a data abort.
Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code
called during enumeration while iterating over a bus. The DM PCIe core
doesn't use this function. Instead, enhance tegra_pcie_conf_address() to
validate the bdf being accessed, and refuse to access invalid devices.
Since pci_skip_dev() isn't used, delete it.
I've also validated that both these WARs are only needed for Tegra20, by
testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in
conditionally.
Fixes:
|
||
|---|---|---|
| .. | ||
| fsl_pci_init.c | ||
| Kconfig | ||
| Makefile | ||
| pci-emul-uclass.c | ||
| pci-uclass.c | ||
| pci.c | ||
| pci_auto.c | ||
| pci_auto_common.c | ||
| pci_auto_old.c | ||
| pci_common.c | ||
| pci_compat.c | ||
| pci_ftpci100.c | ||
| pci_gt64120.c | ||
| pci_indirect.c | ||
| pci_internal.h | ||
| pci_msc01.c | ||
| pci_mvebu.c | ||
| pci_rom.c | ||
| pci_sandbox.c | ||
| pci_sh4.c | ||
| pci_sh7751.c | ||
| pci_sh7780.c | ||
| pci_tegra.c | ||
| pci_x86.c | ||
| pcie_imx.c | ||
| pcie_layerscape.c | ||
| tsi108_pci.c | ||
| w83c553f.c | ||