Nishanth Menon 3eb80d10c7 ARM: DRA7: DDR: Enable SR in Power Management Control ... If EMIF is idle for certain amount of DDR cycles, EMIF will put the DDR in self refresh mode to save power if EMIF_PWR_MGMT_CTRL register is programmed. And also before entering suspend-resume ddr needs to be put in self-refresh. Linux kernel does not program this register before entering suspend and relies on u-boot setting. So configuring it in u-boot. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Tested-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>		2016-03-15 21:30:19 -04:00
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asm	ARM: DRA7: DDR: Enable SR in Power Management Control	2016-03-15 21:30:19 -04:00
debug	arm: debug: replace license blocks with SPDX	2014-10-26 22:22:09 +01:00