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https://github.com/AsahiLinux/u-boot
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9df16c5937
Add helper code for PVR (Processor Version Register) data handling. It will be used by the UCLASS_CPU driver to populate cpuinfo fields at runtime. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-13-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
75 lines
2.1 KiB
C
75 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2022, Ovidiu Panait <ovpanait@gmail.com>
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*/
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#ifndef __ASM_MICROBLAZE_PVR_H
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#define __ASM_MICROBLAZE_PVR_H
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#include <asm/asm.h>
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#define PVR_FULL_COUNT 13 /* PVR0 - PVR12 */
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#define __get_pvr(val, reg) \
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__asm__ __volatile__ ("mfs %0," #reg : "=r" (val) :: "memory")
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#define get_pvr(pvrid, val) \
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__get_pvr(val, rpvr ## pvrid)
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#define PVR_MSR_BIT 0x00000400
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/* PVR0 masks */
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#define PVR0_PVR_FULL_MASK 0x80000000
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#define PVR0_VERSION_MASK 0x0000FF00
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/* PVR4 masks - ICache configs */
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#define PVR4_ICACHE_LINE_LEN_MASK 0x00E00000 /* ICLL */
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#define PVR4_ICACHE_BYTE_SIZE_MASK 0x001F0000 /* ICBS */
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/* PVR5 masks - DCache configs */
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#define PVR5_DCACHE_LINE_LEN_MASK 0x00E00000 /* DCLL */
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#define PVR5_DCACHE_BYTE_SIZE_MASK 0x001F0000 /* DCBS */
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/* PVR10 masks - FPGA family */
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#define PVR10_TARGET_FAMILY_MASK 0xFF000000
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/* PVR11 masks - MMU */
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#define PVR11_USE_MMU 0xC0000000
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/* PVR access macros */
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#define PVR_VERSION(pvr) \
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((pvr[0] & PVR0_VERSION_MASK) >> 8)
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#define PVR_ICACHE_LINE_LEN(pvr) \
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((1 << ((pvr[4] & PVR4_ICACHE_LINE_LEN_MASK) >> 21)) << 2)
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#define PVR_ICACHE_BYTE_SIZE(pvr) \
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(1 << ((pvr[4] & PVR4_ICACHE_BYTE_SIZE_MASK) >> 16))
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#define PVR_DCACHE_LINE_LEN(pvr) \
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((1 << ((pvr[5] & PVR5_DCACHE_LINE_LEN_MASK) >> 21)) << 2)
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#define PVR_DCACHE_BYTE_SIZE(pvr) \
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(1 << ((pvr[5] & PVR5_DCACHE_BYTE_SIZE_MASK) >> 16))
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#define PVR_USE_MMU(pvr) \
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((pvr[11] & PVR11_USE_MMU) >> 30)
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#define PVR_TARGET_FAMILY(pvr) \
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((pvr[10] & PVR10_TARGET_FAMILY_MASK) >> 24)
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/**
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* microblaze_cpu_has_pvr_full() - Check for full PVR support
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*
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* Check MSR register for PVR support and, if applicable, check the PVR0
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* register for full PVR support.
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*
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* Return: 1 if there is full PVR support, 0 otherwise.
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*/
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int microblaze_cpu_has_pvr_full(void);
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/**
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* microblaze_get_all_pvrs() - Copy PVR0-PVR12 to destination array
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*
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* @pvr: destination array of size PVR_FULL_COUNT
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*/
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void microblaze_get_all_pvrs(u32 pvr[PVR_FULL_COUNT]);
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#endif /* __ASM_MICROBLAZE_PVR_H */
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