mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-11-24 21:54:01 +00:00
93cac45c97
Move the crypto and sec_jr* nodes from board-specific u-boot.dtsi files into the common files. Additionally protect the nodes with ifdef CONFIG_FSL_CAAM as they don't serve any purpose if that is not enabled. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
125 lines
1.3 KiB
Text
125 lines
1.3 KiB
Text
// SPDX-License-Identifier: GPL-2.0+ OR MIT
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/*
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* Copyright (C) 2019 Kontron Electronics GmbH
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*/
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#include "imx8mm-u-boot.dtsi"
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/ {
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aliases {
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usb0 = &usbotg1;
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usb1 = &usbotg2;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdog1>;
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bootph-pre-ram;
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};
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};
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&i2c1 {
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bootph-pre-ram;
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bootph-all;
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};
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&i2c2 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2>;
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};
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&iomuxc {
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
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MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
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>;
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};
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};
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&pinctrl_ecspi1 {
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bootph-pre-ram;
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};
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&pinctrl_i2c1 {
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bootph-pre-ram;
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};
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&pinctrl_pmic {
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bootph-pre-ram;
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};
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&pinctrl_uart3 {
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bootph-pre-ram;
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bootph-all;
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};
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&pinctrl_usdhc1 {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_100mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc1_200mhz {
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bootph-pre-ram;
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};
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&pinctrl_usdhc2 {
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bootph-pre-ram;
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};
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&pca9450 {
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bootph-pre-ram;
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};
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&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} {
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bootph-pre-ram;
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};
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&ecspi1 {
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bootph-pre-ram;
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};
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&gpio1 {
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bootph-pre-ram;
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};
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&gpio2 {
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bootph-pre-ram;
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};
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&gpio3 {
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bootph-pre-ram;
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};
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&gpio4 {
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bootph-pre-ram;
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};
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&gpio5 {
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bootph-pre-ram;
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};
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&uart3 {
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bootph-pre-ram;
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bootph-all;
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};
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&usdhc1 {
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bootph-pre-ram;
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};
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&usdhc2 {
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bootph-pre-ram;
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};
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&wdog1 {
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bootph-pre-ram;
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};
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&pinctrl_wdog {
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bootph-pre-ram;
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};
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