u-boot/arch/arm/dts/socfpga_cyclone5_socrates.dts
Simon Goldschmidt a6fbf94550 arm: socfpga: fix qspi flash compatible (add "spi-flash")
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:15 +01:00

87 lines
1.4 KiB
Text

/*
* Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "EBV SOCrates";
compatible = "ebv,socrates", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "console=ttyS0,115200";
};
aliases {
/*
* This allows the ethaddr uboot environment variable
* contents to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
udc0 = &usb1;
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
soc {
u-boot,dm-pre-reloc;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txen-skew-ps = <0>;
txc-skew-ps = <2600>;
rxdv-skew-ps = <0>;
rxc-skew-ps = <2000>;
};
&i2c0 {
status = "okay";
rtc: rtc@68 {
compatible = "stm,m41t82";
reg = <0x68>;
};
};
&mmc0 {
status = "okay";
u-boot,dm-pre-reloc;
};
&qspi {
status = "okay";
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00", "spi-flash";
reg = <0>; /* chip select */
spi-max-frequency = <50000000>;
m25p,fast-read;
page-size = <256>;
block-size = <16>; /* 2^16, 64KB */
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
};
};
&usb1 {
disable-over-current;
status = "okay";
};