u-boot/drivers/ddr/marvell/a38x
Marek Vasut 29b59353fe arm: mvebu: a38x: Weed out floating point use
For reason unknown, recently, the DDR init code writers are really fond
of hiding some small floating point operating deep in their creations.
This patch removes one from the Marvell A38x code.

Instead of returning size of chip as float from ddr3_get_device_size()
in GiB units, return it as int in MiB units. Since this would interfere
with the huge switch code in ddr3_calc_mem_cs_size(), rework the code
to match the change.

Before this patch, the cs_mem_size variable could have these values:
 ( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 =
   { 0.000000, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000,
     0.250000, 0.500000, 1.000000, 2.000000, 4.000000, }
The switch code checked for a subset of the resulting RAM sizes, which
is in range 128 MiB ... 2048 MiB.

With this patch, the cs_mem_size variable can have these values:
 ( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 =
   { 0, 64, 128, 256, 512, 1024, 2048, 4096 }
To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB
and 4096 MiB options.

Removing the floating point stuff also saves 1.5k from text segment:
  clearfog       :  spl/u-boot-spl:all -1592  spl/u-boot-spl:text -1592

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2016-05-20 11:01:00 +02:00
..
ddr3_a38x.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_a38x.h arm: mvebu: a38x: Remove unsupported topologies 2015-11-17 23:41:41 +01:00
ddr3_a38x_mc_static.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_a38x_topology.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_a38x_training.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_debug.c arm: mvebu: ddr: Fix compilation warning 2016-01-14 14:08:59 +01:00
ddr3_hws_hw_training.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_hws_hw_training.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_hws_hw_training_def.h arm: mvebu: Fix SAR1_CPU_CORE_MASK 2015-11-17 23:41:41 +01:00
ddr3_hws_sil_training.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_init.c arm: mvebu: a38x: Weed out floating point use 2016-05-20 11:01:00 +02:00
ddr3_init.h Fix spelling of "occurred". 2016-05-02 18:37:09 -04:00
ddr3_logging_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_patterns_64bit.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_topology_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_bist.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_centralization.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_db.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_hw_algo.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_hw_algo.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip.h arm: mvebu: ddr: Fix compilation warning 2016-01-14 14:08:59 +01:00
ddr3_training_ip_bist.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_centralization.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_db.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_engine.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_engine.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_flow.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_pbs.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_prv_if.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_ip_static.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_leveling.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_leveling.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_pbs.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr3_training_static.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr_topology_def.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
ddr_training_ip_db.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
Makefile arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
silicon_if.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor.c arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00
xor_regs.h arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr 2015-07-23 10:38:44 +02:00