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https://github.com/AsahiLinux/u-boot
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9d0c2ceb35
This is the first ARMv8 SoC from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
73 lines
1.5 KiB
C
73 lines
1.5 KiB
C
/*
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* Copyright (C) 2013-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/io.h>
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#include "sg-regs.h"
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int print_cpuinfo(void)
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{
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u32 revision, type, model, rev, required_model = 1, required_rev = 1;
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revision = readl(SG_REVISION);
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type = (revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT;
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model = (revision & SG_REVISION_MODEL_MASK) >> SG_REVISION_MODEL_SHIFT;
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rev = (revision & SG_REVISION_REV_MASK) >> SG_REVISION_REV_SHIFT;
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puts("CPU: ");
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switch (type) {
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case 0x25:
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puts("PH1-sLD3 (MN2WS0220)");
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required_model = 2;
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break;
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case 0x26:
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puts("PH1-LD4 (MN2WS0250)");
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required_rev = 2;
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break;
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case 0x28:
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puts("PH1-Pro4 (MN2WS0230)");
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break;
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case 0x29:
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puts("PH1-sLD8 (MN2WS0270)");
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break;
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case 0x2A:
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puts("PH1-Pro5 (MN2WS0300)");
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break;
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case 0x2E:
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puts("ProXstream2 (MN2WS0310)");
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break;
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case 0x2F:
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puts("PH1-LD6b (MN2WS0320)");
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break;
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case 0x31:
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puts("PH1-LD11 ()");
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break;
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case 0x32:
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puts("PH1-LD20 (SC1401AJ1)");
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break;
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default:
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printf("Unknown Processor ID (0x%x)\n", revision);
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return -1;
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}
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printf(" model %d", model);
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printf(" (rev. %d)\n", rev);
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if (model < required_model) {
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printf("Sorry, this model is not supported.\n");
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printf("Required model is %d.", required_model);
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return -1;
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} else if (rev < required_rev) {
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printf("Sorry, this revision is not supported.\n");
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printf("Required revision is %d.", required_rev);
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return -1;
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}
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return 0;
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}
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