u-boot/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
Marek Vasut 917bd8a876 ARM: dts: socfpga: Factor out U-Boot specifics from A10 handoff files
Pull out the u-boot,dm-pre-reloc from socfpga_arria10_socdk_sdmmc_handoff.dtsi
into separate dtsi header file to make it easier to patch in custom handoff
dtsi files, without having to manually add the U-Boot bits. Shuffle the include
clauses in the A10 DT files to make it obvious what gets included where without
having to follow confusing long chain of includes, i.e. board DT file includes
everything it needs.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2019-05-14 19:53:16 +02:00

76 lines
1.7 KiB
Text

/*
* Copyright (C) 2014-2015 Altera Corporation <www.altera.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/dts-v1/;
#include "socfpga_arria10_socdk.dtsi"
#include "socfpga_arria10_socdk_sdmmc_handoff.dtsi"
#include "socfpga_arria10_handoff_u-boot.dtsi"
/ {
chosen {
firmware-loader = <&fs_loader0>;
};
fs_loader0: fs-loader {
u-boot,dm-pre-reloc;
compatible = "u-boot,fs-loader";
phandlepart = <&mmc 1>;
};
};
&fpga_mgr {
u-boot,dm-pre-reloc;
altr,bitstream = "fit_spl_fpga.itb";
};
&mmc {
u-boot,dm-pre-reloc;
status = "okay";
num-slots = <1>;
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
};
&eccmgr {
sdmmca-ecc@ff8c2c00 {
compatible = "altr,socfpga-sdmmc-ecc";
reg = <0xff8c2c00 0x400>;
altr,ecc-parent = <&mmc>;
interrupts = <15 IRQ_TYPE_LEVEL_HIGH>,
<47 IRQ_TYPE_LEVEL_HIGH>,
<16 IRQ_TYPE_LEVEL_HIGH>,
<48 IRQ_TYPE_LEVEL_HIGH>;
};
};
/* Clock available early */
&main_sdmmc_clk {
u-boot,dm-pre-reloc;
};
&peri_sdmmc_clk {
u-boot,dm-pre-reloc;
};
&sdmmc_free_clk {
u-boot,dm-pre-reloc;
};
&sdmmc_clk {
u-boot,dm-pre-reloc;
};