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f40107345c
The OMAP5 silicon has new DDR PHY design, which includes a external PHY as well. So configuring the ext PHY parameters here. Also the EMIF timimg registers and a couple of DDR mode registers needs to be updated based on the testing from the actual silicon. Signed-off-by: R Sricharan <r.sricharan@ti.com> |
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.. | ||
boot-common.c | ||
clocks-common.c | ||
config.mk | ||
emif-common.c | ||
gpio.c | ||
hwinit-common.c | ||
lowlevel_init.S | ||
Makefile | ||
mem-common.c | ||
reset.S | ||
spl.c | ||
spl_mmc.c | ||
spl_nand.c | ||
spl_ymodem.c | ||
timer.c | ||
u-boot-spl.lds | ||
utils.c | ||
vc.c |