u-boot/arch/arm/dts/am335x-brppt1-nand.dts
Dario Binacchi 72e0a0e1c7 arm: dts: am335x: add 'u-boot, dm-pre-reloc' to panel
Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
compatible node. In this way the video-uclass module can allocate the
amount of memory needed to be assigned to the frame buffer.
For boards that support Linux the property is added to the *-u-boot.dtsi
file since it is a u-boot specific dt flag.

Ran building tests with CONFIG_AM335X_LCD enabled and disabled for the
following configurations:
 - brxre1_defconfig           --> success
 - am335x_guardian_defconfig  --> success
 - am335x_evm_defconfig       --> success
 - da850evm_defconfig         --> failure with CONFIG_AM335X_LCD enabled

Enabling CONFIG_AM335X_LCD in da850evm_defconfig causes building errors
even without applying the patch. The driver has never been enabled on the
da850 and must be adapted for this platform.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Felix Brack <fb@ltec.ch>
2020-03-03 13:08:14 +05:30

365 lines
6 KiB
Text

// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2018 B&R Industrial Automation GmbH
* http://www.br-automation.com
*
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
model = "BRPPT1 (NAND) Panel";
compatible = "ti,am33xx";
fset: factory-settings {
bl-version = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
version = <0x0100>;
order-no = "6PPT30 (NAND)";
hw-revision = "ABCDEFGHIJKLMNOPQRSTUVWXYZ0123456890";
serial-no = "0";
device-id = <0x0>;
parent-id = <0x0>;
hw-variant = <0x1>;
};
aliases {
ds1bkl0 = &pwmbacklight;
ds1bkl1 = &tps_bl;
ds1timing = &timing0;
ds1ctrl = &lcdc;
gpmc = &gpmc;
mmc = &mmc2;
fset = &fset;
};
chosen {
bootargs = "console=ttyO0,115200 earlyprintk";
stdout-path = &uart0;
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
panel {
status = "disabled";
compatible = "ti,tilcdc,panel";
enable-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
backlight = <&pwmbacklight>;
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
native-mode = <&timing0>;
timing0: lcd {
clock-frequency = <32000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <2>;
hback-porch = <192>;
hsync-len = <1>;
vfront-porch = <20>;
vback-porch = <2>;
vsync-len = <1>;
hsync-active = <1>;
vsync-active = <1>;
pupdelay = <10>;
pondelay = <10>;
};
};
};
vmmcsd_fixed: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vmmcsd_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
pwm0: omap-pwm@timer5 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer5>;
#pwm-cells = <3>;
};
pwm1: omap-pwm@timer6 {
compatible = "ti,omap-dmtimer-pwm";
ti,timers = <&timer6>;
#pwm-cells = <3>;
};
beeper: pwm-beep {
compatible = "pwm-beeper";
pwms = <&pwm0 0 0 0>;
};
pwmbacklight: pwm-bkl {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000 0>;
default-brightness-level = <255>;
brightness-levels = <0 16 32 64 128 170 202 234 255>;
power-supply = <&vmmcsd_fixed>;
enable-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
};
};
&uart0 { /* console uart */
u-boot,dm-spl;
status = "okay";
};
&uart1 {
status = "okay";
};
&i2c0 {
u-boot,dm-spl;
status = "okay";
clock-frequency = <400000>;
tps: tps@24 { /* PMIC controller */
u-boot,dm-spl;
reg = <0x24>;
compatible = "ti,tps65217";
tps_bl: backlight {
compatible = "ti,tps65217-bl";
isel = <1>; /* 1 - ISET1, 2 ISET2 */
fdim = <1000>; /* TPS65217_BL_FDIM_1kHZ */
default-brightness = <50>;
};
};
};
&i2c2 {
status = "okay";
clock-frequency = <100000>;
};
&edma {
status = "okay";
};
&cppi41dma {
status = "okay";
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
dr_mode = "host";
};
&usb1 {
status = "okay";
dr_mode = "host";
};
&davinci_mdio {
status = "okay";
phy0: ethernet-phy@0 {
reg = <1>;
};
phy1: ethernet-phy@1 {
reg = <2>;
};
};
&mac {
dual_emac;
status = "okay";
};
&cpsw_emac0 {
phy-handle = <&phy0>;
dual_emac_res_vlan = <1>;
phy-mode = "mii";
};
&cpsw_emac1 {
phy-handle = <&phy1>;
dual_emac_res_vlan = <2>;
phy-mode = "mii";
};
&mmc2 {
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <0x4>;
ti,non-removable;
ti,needs-special-hs-handling;
ti,vcc-aux-disable-is-sleep;
status = "disabled";
};
&lcdc {
status = "disabled";
};
&elm {
status = "okay";
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&gpio0 {
u-boot,dm-spl;
ti,no-reset-on-init;
};
&gpio1 {
u-boot,dm-spl;
ti,no-reset-on-init;
};
&gpio2 {
u-boot,dm-spl;
ti,no-reset-on-init;
};
&gpio3 {
u-boot,dm-spl;
ti,no-reset-on-init;
};
&wdt2 {
ti,no-reset-on-init;
ti,no-idle-on-init;
};
&tscadc {
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,zx-cutoff-ratio = <40>;
ti,min_deviation = <60>;
ti,max_deviation = <600>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
bnr-buttons {
Home-Button {};
};
};
adc {
ti,adc-channels = <5 6 7>;
};
};
&gpmc {
u-boot,dm-spl;
status = "okay";
pinctrl-names = "default";
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
interrupt-parent = <&gpmc>;
rb-gpios = <&gpmc 1 GPIO_ACTIVE_HIGH>; /* gpmc_wait1 */
ti,nand-ecc-opt = "bch8";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
gpmc,wait-pin = <1>;
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.MLO";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.cfgscr";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.dtb";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.u-boot-env";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot";
reg = <0x00080000 0x00080000>;
};
partition@5 {
label = "NAND.kernel";
reg = <0x00100000 0x00400000>;
};
partition@6 {
label = "NAND.rootfs";
reg = <0x00500000 0x08000000>;
};
partition@7 {
label = "NAND.user";
reg = <0x08500000 0x17b00000>;
};
};
};