u-boot/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts
Michal Simek ce90654d1c xilinx: Sync DTs with Linux kernel
There are several changes which happen in mainline kernel which should get
also to U-Boot. Here is the list of patches from the kernel:

- ARM: zynq: Fix leds subnode name for zc702/zybo-z7
- arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
- arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
- arm64: dts: zynqmp: Wire up the DisplayPort subsystem
- arm64: dts: zynqmp: Add DisplayPort subsystem
- arm64: dts: zynqmp: Add DPDMA node
- arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
- arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
- arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106
- arm64: dts: zynqmp-zcu100-revC: correct interrupt flags
- arm64: dts: xilinx: align GPIO hog names with dtschema
- arm64: zynqmp: Add Xilinx AES node
- dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA

but also some other changes have been done.
- Using only one compatible string for adxl345 on zturn
- Remove Xilinx internal DP bindings
- Remove USB3.0 serdes configurations
- Remove SATA serdes configuration for zc1232
- Resort nvmem_firmware
- Update nand compatible string
- Aling power-domains property for sd0/1

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-03-30 12:03:24 +02:00

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// SPDX-License-Identifier: GPL-2.0+
/*
* dts file for Xilinx ZynqMP zc1751-xm018-dc4
*
* (C) Copyright 2015 - 2020, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/
/dts-v1/;
#include "zynqmp.dtsi"
#include "zynqmp-clk-ccf.dtsi"
/ {
model = "ZynqMP zc1751-xm018-dc4";
compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp";
aliases {
can0 = &can0;
can1 = &can1;
ethernet0 = &gem0;
ethernet1 = &gem1;
ethernet2 = &gem2;
ethernet3 = &gem3;
gpio0 = &gpio;
i2c0 = &i2c0;
i2c1 = &i2c1;
rtc0 = &rtc;
serial0 = &uart0;
serial1 = &uart1;
spi0 = &qspi;
};
chosen {
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>;
};
};
&can0 {
status = "okay";
};
&can1 {
status = "okay";
};
&fpd_dma_chan1 {
status = "okay";
};
&fpd_dma_chan2 {
status = "okay";
};
&fpd_dma_chan3 {
status = "okay";
};
&fpd_dma_chan4 {
status = "okay";
};
&fpd_dma_chan5 {
status = "okay";
};
&fpd_dma_chan6 {
status = "okay";
};
&fpd_dma_chan7 {
status = "okay";
};
&fpd_dma_chan8 {
status = "okay";
};
&lpd_dma_chan1 {
status = "okay";
};
&lpd_dma_chan2 {
status = "okay";
};
&lpd_dma_chan3 {
status = "okay";
};
&lpd_dma_chan4 {
status = "okay";
};
&lpd_dma_chan5 {
status = "okay";
};
&lpd_dma_chan6 {
status = "okay";
};
&lpd_dma_chan7 {
status = "okay";
};
&lpd_dma_chan8 {
status = "okay";
};
&zynqmp_dpsub {
status = "okay";
};
&zynqmp_dpdma {
status = "okay";
};
&gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy0>;
ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
reg = <0>;
};
ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
reg = <7>;
};
ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
reg = <3>;
};
ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
reg = <8>;
};
};
&gem1 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy7>;
};
&gem2 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy3>;
};
&gem3 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy8>;
};
&gpio {
status = "okay";
};
&gpu {
status = "okay";
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
status = "okay";
};
&qspi {
status = "okay";
flash@0 {
compatible = "m25p80", "jedec,spi-nor"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; /* also DUAL configuration possible */
spi-max-frequency = <108000000>; /* Based on DC1 spec */
partition@0 { /* for testing purpose */
label = "qspi-fsbl-uboot";
reg = <0x0 0x100000>;
};
partition@100000 { /* for testing purpose */
label = "qspi-linux";
reg = <0x100000 0x500000>;
};
partition@600000 { /* for testing purpose */
label = "qspi-device-tree";
reg = <0x600000 0x20000>;
};
partition@620000 { /* for testing purpose */
label = "qspi-rootfs";
reg = <0x620000 0x5E0000>;
};
};
};
&rtc {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&watchdog0 {
status = "okay";
};