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https://github.com/AsahiLinux/u-boot
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1b05136a6c
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: Humberto Naves <hsnaves@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
86 lines
1.1 KiB
Text
86 lines
1.1 KiB
Text
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2017, Intel Corporation
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*
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* Adapted from socfpga_cyclone5_de10_nano.dts
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*/
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#include "socfpga_cyclone5.dtsi"
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#include "socfpga-common-u-boot.dtsi"
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/ {
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model = "Terasic DE10-Standard";
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compatible = "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = "serial0:115200n8";
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};
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aliases {
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ethernet0 = &gmac1;
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udc0 = &usb1;
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};
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memory {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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rxd0-skew-ps = <420>;
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rxd1-skew-ps = <420>;
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rxd2-skew-ps = <420>;
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rxd3-skew-ps = <420>;
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txen-skew-ps = <0>;
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txc-skew-ps = <1860>;
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rxdv-skew-ps = <420>;
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rxc-skew-ps = <1680>;
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&porta {
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bank-name = "porta";
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};
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&portb {
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bank-name = "portb";
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};
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&portc {
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bank-name = "portc";
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};
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&mmc0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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&usb1 {
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status = "okay";
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};
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&uart0 {
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clock-frequency = <100000000>;
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u-boot,dm-pre-reloc;
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};
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&watchdog0 {
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status = "disabled";
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};
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