mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-13 14:53:06 +00:00
f3285deeca
Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.
To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.
Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.
[1]
9e644284ab ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
161 lines
1.5 KiB
Text
161 lines
1.5 KiB
Text
// SPDX-License-Identifier: GPL-2.0
|
|
/*
|
|
* Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
|
|
*/
|
|
|
|
#include "k3-am64x-binman.dtsi"
|
|
|
|
/ {
|
|
chosen {
|
|
tick-timer = &main_timer0;
|
|
};
|
|
|
|
memory@80000000 {
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&cbass_main{
|
|
bootph-all;
|
|
};
|
|
|
|
&main_timer0 {
|
|
bootph-all;
|
|
clock-frequency = <200000000>;
|
|
};
|
|
|
|
&main_conf {
|
|
bootph-all;
|
|
chipid@14 {
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&main_pmx0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_i2c0_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_i2c0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_uart0_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_uart0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&dmss {
|
|
bootph-all;
|
|
};
|
|
|
|
&secure_proxy_main {
|
|
bootph-all;
|
|
};
|
|
|
|
&dmsc {
|
|
bootph-all;
|
|
k3_sysreset: sysreset-controller {
|
|
compatible = "ti,sci-sysreset";
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&k3_pds {
|
|
bootph-all;
|
|
};
|
|
|
|
&k3_clks {
|
|
bootph-all;
|
|
};
|
|
|
|
&k3_reset {
|
|
bootph-all;
|
|
};
|
|
|
|
&sdhci0 {
|
|
status = "disabled";
|
|
bootph-all;
|
|
};
|
|
|
|
&sdhci1 {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_mmc1_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&cpsw3g {
|
|
bootph-all;
|
|
|
|
ethernet-ports {
|
|
bootph-all;
|
|
};
|
|
};
|
|
|
|
&cpsw_port2 {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_bcdma {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_pktdma {
|
|
bootph-all;
|
|
};
|
|
|
|
&rgmii1_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&rgmii2_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&mdio1_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&cpsw3g_phy1 {
|
|
bootph-all;
|
|
};
|
|
|
|
&main_usb0_pins_default {
|
|
bootph-all;
|
|
};
|
|
|
|
&serdes_ln_ctrl {
|
|
u-boot,mux-autoprobe;
|
|
};
|
|
|
|
&usbss0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&usb0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&serdes_wiz0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&serdes0_usb_link {
|
|
bootph-all;
|
|
};
|
|
|
|
&serdes0 {
|
|
bootph-all;
|
|
};
|
|
|
|
&serdes_refclk {
|
|
bootph-all;
|
|
};
|