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https://github.com/AsahiLinux/u-boot
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b39643b72c
Fix: common/libcommon.o: In function `cread_line': /home/ag/git/u-boot/common/main.c:695: undefined reference to `get_ticks' /home/ag/git/u-boot/common/main.c:695: undefined reference to `get_tbclk' /home/ag/git/u-boot/common/main.c:698: undefined reference to `get_ticks' Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Alessandro Rubini <rubini@unipv.it>
87 lines
2.4 KiB
C
87 lines
2.4 KiB
C
/*
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* (C) Copyright 2009 Alessandro Rubini
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/mtu.h>
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/*
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* The timer is a decrementer, we'll left it free running at 2.4MHz.
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* We have 2.4 ticks per microsecond and an overflow in almost 30min
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*/
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#define TIMER_CLOCK (24 * 100 * 1000)
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#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */
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#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */
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#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
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#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
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/* macro to read the decrementing 32 bit timer as an increasing count */
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#define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
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/* Configure a free-running, auto-wrap counter with no prescaler */
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int timer_init(void)
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{
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ulong val;
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writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
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CONFIG_SYS_TIMERBASE + MTU_CR(0));
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/* Reset the timer */
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writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0));
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/*
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* The load-register isn't really immediate: it changes on clock
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* edges, so we must wait for our newly-written value to appear.
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* Since we might miss reading 0, wait for any change in value.
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*/
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val = READ_TIMER();
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while (READ_TIMER() == val)
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;
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return 0;
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}
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/* Return how many HZ passed since "base" */
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ulong get_timer(ulong base)
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{
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return TICKS_TO_HZ(READ_TIMER()) - base;
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}
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/* Delay x useconds */
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void __udelay(unsigned long usec)
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{
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ulong ini, end;
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ini = READ_TIMER();
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end = ini + USEC_TO_COUNT(usec);
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while ((signed)(end - READ_TIMER()) > 0)
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;
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}
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unsigned long long get_ticks(void)
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{
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return get_timer(0);
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}
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ulong get_tbclk(void)
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{
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return CONFIG_SYS_HZ;
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}
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