mirror of
https://github.com/AsahiLinux/u-boot
synced 2024-12-19 17:53:08 +00:00
401d1c4f5d
Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
205 lines
4.1 KiB
C
205 lines
4.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018
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* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
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*/
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#include <common.h>
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#include <init.h>
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#include <asm/global_data.h>
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#include <asm/io.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/iomux-mx53.h>
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#include <asm/arch/clock.h>
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#include <asm/gpio.h>
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#include <env.h>
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#include <power/pmic.h>
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#include <fsl_pmic.h>
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#include <bootstage.h>
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#include "kp_id_rev.h"
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#define BOOSTER_OFF IMX_GPIO_NR(2, 23)
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#define LCD_BACKLIGHT IMX_GPIO_NR(1, 1)
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#define KEY1 IMX_GPIO_NR(2, 26)
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#define LED_RED IMX_GPIO_NR(3, 28)
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DECLARE_GLOBAL_DATA_PTR;
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int dram_init(void)
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{
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u32 size;
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size = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
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gd->ram_size = size;
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return 0;
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}
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int dram_init_banksize(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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return 0;
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}
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static int power_init(void)
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{
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struct udevice *dev;
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int ret;
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ret = pmic_get("mc34708@8", &dev);
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if (ret) {
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printf("%s: mc34708 not found !\n", __func__);
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return ret;
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}
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/* Set VDDGP to 1.110V for 800 MHz on SW1 */
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pmic_clrsetbits(dev, REG_SW_0, SWx_VOLT_MASK_MC34708,
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SWx_1_110V_MC34708);
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/* Set VCC as 1.30V on SW2 */
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pmic_clrsetbits(dev, REG_SW_1, SWx_VOLT_MASK_MC34708,
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SWx_1_300V_MC34708);
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/* Set global reset timer to 4s */
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pmic_clrsetbits(dev, REG_POWER_CTL2, TIMER_MASK_MC34708,
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TIMER_4S_MC34708);
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return ret;
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}
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static void setup_clocks(void)
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{
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int ret;
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u32 ref_clk = MXC_HCLK;
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/*
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* CPU clock set to 800MHz and DDR to 400MHz
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*/
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ret = mxc_set_clock(ref_clk, 800, MXC_ARM_CLK);
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if (ret)
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printf("CPU: Switch CPU clock to 800MHZ failed\n");
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ret = mxc_set_clock(ref_clk, 400, MXC_PERIPH_CLK);
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ret |= mxc_set_clock(ref_clk, 400, MXC_DDR_CLK);
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if (ret)
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printf("CPU: Switch DDR clock to 400MHz failed\n");
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}
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static void setup_ups(void)
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{
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gpio_request(BOOSTER_OFF, "BOOSTER_OFF");
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gpio_direction_output(BOOSTER_OFF, 0);
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}
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int board_early_init_f(void)
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{
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return 0;
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}
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/*
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* Do not overwrite the console
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* Use always serial for U-Boot console
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*/
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int overwrite_console(void)
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{
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return 1;
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}
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int board_init(void)
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{
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gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
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return 0;
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}
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void board_disable_display(void)
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{
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gpio_request(LCD_BACKLIGHT, "LCD_BACKLIGHT");
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gpio_direction_output(LCD_BACKLIGHT, 0);
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}
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void board_misc_setup(void)
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{
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gpio_request(KEY1, "KEY1_GPIO");
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gpio_direction_input(KEY1);
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if (gpio_get_value(KEY1))
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env_set("key1", "off");
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else
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env_set("key1", "on");
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}
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int board_late_init(void)
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{
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int ret = 0;
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board_disable_display();
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setup_ups();
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if (!power_init())
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setup_clocks();
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ret = read_eeprom();
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if (ret)
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printf("Error %d reading EEPROM content!\n", ret);
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show_eeprom();
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read_board_id();
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board_misc_setup();
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return ret;
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}
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#define GPIO_DR 0x0
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#define GPIO_GDIR 0x4
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#define GPIO_ALT1 0x1
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#define GPIO5_BASE 0x53FDC000
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#define IOMUXC_EIM_WAIT 0x53FA81E4
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/* Green LED: GPIO5_0 */
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#define GPIO_GREEN BIT(0)
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void show_boot_progress(int status)
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{
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/*
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* This BOOTSTAGE_ID is called at very early stage of execution. DM gpio
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* is not yet initialized.
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*/
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if (status == BOOTSTAGE_ID_START_UBOOT_F) {
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/*
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* After ROM execution the EIM_WAIT PAD is set as ALT0
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* (according to RM it shall be ALT1 after reset). To use it as
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* GPIO we need to set it to ALT1.
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*/
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setbits_le32(((uint32_t *)(IOMUXC_EIM_WAIT)), GPIO_ALT1);
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/* Configure green LED GPIO pin direction */
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setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_GDIR)),
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GPIO_GREEN);
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/* Turn on green LED */
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setbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)), GPIO_GREEN);
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}
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/*
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* This BOOTSTAGE_ID is called just before handling execution to kernel
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* - i.e. gpio subsystem is already initialized
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*/
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if (status == BOOTSTAGE_ID_BOOTM_HANDOFF) {
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/*
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* Off green LED - the same approach - i.e. non dm gpio
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* (*bits_le32) is used as in the very early stage.
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*/
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clrbits_le32(((uint32_t *)(GPIO5_BASE + GPIO_DR)),
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GPIO_GREEN);
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/*
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* On red LED
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*/
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gpio_request(LED_RED, "LED_RED_ERROR");
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gpio_direction_output(LED_RED, 1);
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}
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}
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