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8092e9d0e0
Disable the FMan mEMAC 5 and 6 nodes from the fdt since they are not available under the supported RCW. Also disable the associated "fsl,dpa-ethernet" nodes that reference them. This is a simplified version of the fdt_fixup_fman_ethernet call for use under DM_ETH. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
145 lines
3.6 KiB
C
145 lines
3.6 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2014 Freescale Semiconductor, Inc.
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* Copyright 2021 NXP
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*
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* Shengzhou Liu <Shengzhou.Liu@freescale.com>
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*/
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#include <common.h>
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#include <command.h>
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#include <fdt_support.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/mmu.h>
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#include <asm/processor.h>
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#include <asm/immap_85xx.h>
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#include <asm/fsl_law.h>
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#include <asm/fsl_serdes.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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#include <malloc.h>
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#include <fm_eth.h>
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#include <fsl_mdio.h>
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#include <miiphy.h>
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#include <phy.h>
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#include <fsl_dtsec.h>
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#include <asm/fsl_serdes.h>
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int board_eth_init(struct bd_info *bis)
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{
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#if defined(CONFIG_FMAN_ENET)
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int i, interface;
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struct memac_mdio_info dtsec_mdio_info;
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struct memac_mdio_info tgec_mdio_info;
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struct mii_dev *dev;
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ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
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u32 srds_s1;
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srds_s1 = in_be32(&gur->rcwsr[4]) &
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FSL_CORENET2_RCWSR4_SRDS1_PRTCL;
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srds_s1 >>= FSL_CORENET2_RCWSR4_SRDS1_PRTCL_SHIFT;
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dtsec_mdio_info.regs =
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(struct memac_mdio_controller *)CONFIG_SYS_FM1_DTSEC_MDIO_ADDR;
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dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
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/* Register the 1G MDIO bus */
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fm_memac_mdio_init(bis, &dtsec_mdio_info);
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tgec_mdio_info.regs =
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(struct memac_mdio_controller *)CONFIG_SYS_FM1_TGEC_MDIO_ADDR;
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tgec_mdio_info.name = DEFAULT_FM_TGEC_MDIO_NAME;
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/* Register the 10G MDIO bus */
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fm_memac_mdio_init(bis, &tgec_mdio_info);
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/* Set the two on-board RGMII PHY address */
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fm_info_set_phy_address(FM1_DTSEC3, RGMII_PHY1_ADDR);
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fm_info_set_phy_address(FM1_DTSEC4, RGMII_PHY2_ADDR);
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switch (srds_s1) {
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case 0x66:
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case 0x6b:
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fm_info_set_phy_address(FM1_10GEC1, CORTINA_PHY_ADDR1);
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fm_info_set_phy_address(FM1_10GEC2, CORTINA_PHY_ADDR2);
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fm_info_set_phy_address(FM1_10GEC3, FM1_10GEC3_PHY_ADDR);
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fm_info_set_phy_address(FM1_10GEC4, FM1_10GEC4_PHY_ADDR);
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break;
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default:
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printf("SerDes1 protocol 0x%x is not supported on T208xRDB\n",
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srds_s1);
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break;
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}
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for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
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interface = fm_info_get_enet_if(i);
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switch (interface) {
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case PHY_INTERFACE_MODE_RGMII:
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case PHY_INTERFACE_MODE_RGMII_TXID:
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case PHY_INTERFACE_MODE_RGMII_RXID:
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case PHY_INTERFACE_MODE_RGMII_ID:
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dev = miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME);
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fm_info_set_mdio(i, dev);
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break;
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default:
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break;
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}
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}
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for (i = FM1_10GEC1; i < FM1_10GEC1 + CONFIG_SYS_NUM_FM1_10GEC; i++) {
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switch (fm_info_get_enet_if(i)) {
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case PHY_INTERFACE_MODE_XGMII:
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dev = miiphy_get_dev_by_name(DEFAULT_FM_TGEC_MDIO_NAME);
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fm_info_set_mdio(i, dev);
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break;
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default:
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break;
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}
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}
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cpu_eth_init(bis);
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#endif /* CONFIG_FMAN_ENET */
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return pci_eth_init(bis);
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}
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/* Disable the MAC5 and MAC6 "fsl,fman-memac" nodes and the two
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* "fsl,dpa-ethernet" nodes that reference them.
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*/
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void fdt_fixup_board_fman_ethernet(void *fdt)
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{
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int mac_off, eth_off, i;
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char mac_path[2][42] = {
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"/soc@ffe000000/fman@400000/ethernet@e8000",
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"/soc@ffe000000/fman@400000/ethernet@ea000",
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};
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u32 eth_ph;
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for (i = 0; i < 2; i++) {
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/* Disable the MAC node */
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mac_off = fdt_path_offset(fdt, mac_path[i]);
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if (mac_off < 0)
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continue;
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fdt_status_disabled(fdt, mac_off);
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/* Disable the fsl,dpa-ethernet node that points to the MAC.
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* The fsl,fman-mac property refers to the MAC's phandle.
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*/
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eth_ph = fdt_get_phandle(fdt, mac_off);
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if (eth_ph <= 0)
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continue;
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eth_off = fdt_node_offset_by_prop_value(fdt, -1, "fsl,fman-mac",
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ð_ph,
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sizeof(eth_ph));
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if (eth_off >= 0)
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fdt_status_disabled(fdt, eth_off);
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}
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}
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void fdt_fixup_board_enet(void *fdt)
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{
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return;
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}
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